Datasheet

V850ES/JG3 CHAPTER 16 3-WIRE VARIABLE-LENGTH SERIAL I/O (CSIB)
R01UH0015EJ0300 Rev.3.00 Page 526 of 870
Sep 30, 2010
16.6.13 Reception error
When transfer is performed with reception enabled (CBnCTL0.CBnRXE bit = 1) in the continuous transfer mode, the
reception completion interrupt request signal (INTCBnR) is generated again when the next receive operation is completed
before the CBnRX register is read after the INTCBnR signal is generated, and the overrun error flag (CBnSTR.CBnOVE) is
set to 1.
Even if an overrun error has occurred, the previous receive data is lost since the CBnRX register is updated. Even if a
reception error has occurred, the INTCBnR signal is generated again upon the next reception completion if the CBnRX
register is not read.
To avoid an overrun error, complete reading the CBnRX register until one half clock before sampling the last bit of the
next receive data from the INTCBnR signal generation.
(1) Operation timing
SCKBn pin
CBnRX register
read signal
(1) (2) (4)
01H 02H 05H 0AH 15H 2AH 55H AAH 00H 01H 02H 05H 0AH 15H 2AH 55H
Shift register
AAH 55H
CBnRX register
SIBn pin
INTCBnR signal
CBnOVE bit
SIBn pin capture
timing
(3)
(1) Start continuous transfer.
(2) Completion of the first transfer
(3) The CBnRX register cannot be read until one half clock before the completion of the second transfer.
(4) An overrun error occurs, and the reception completion interrupt request signal (INTCBnR) is
generated, and then the overrun error flag (CBnSTR.CBnOVE) is set to 1. The receive data is
overwritten.
Remark n = 0 to 4