Datasheet

V850ES/JG3 CHAPTER 3 CPU FUNCTION
R01UH0015EJ0300 Rev.3.00 Page 35 of 870
Sep 30, 2010
3.4 Address Space
3.4.1 CPU address space
For instruction addressing, up to a combined total of 16 MB of an external memory area and an internal ROM area,
plus an internal RAM area, are supported in a linear address space (program space) of up to 64 MB. For operand
addressing (data access), up to 4 GB of a linear address space (data space) is supported. The 4 GB address space,
however, is viewed as 64 images of a 64 MB physical address space. This means that the same 64 MB physical address
space is accessed regardless of the value of bits 31 to 26.
Figure 3-1. Image on Address Space
Program space
Internal RAM area
Use-prohibited area
Use-prohibited area
External memory area
Internal ROM area
(external memory area)
Data space
Image 63
Image 1
Image 0
Peripheral I/O area
Internal RAM area
Use-prohibited area
External memory area
Internal ROM area
(external memory area)
16 MB
4 GB
64 MB
64 MB