Datasheet

V850ES/JG3 CHAPTER 15 ASYNCHRONOUS SERIAL INTERFACE A (UARTA)
R01UH0015EJ0300 Rev.3.00 Page 479 of 870
Sep 30, 2010
To set the baud rate, perform the following calculation for setting the UAnCTL1 and UAnCTL2 registers (when using
internal clock).
<1> Set k to fxx/(2 × target baud rate) and m to 0.
<2> If k is 256 or greater (k ≥ 256), reduce k to half (k/2) and increment m by 1 (m + 1).
<3> Repeat Step <2> until k becomes less than 256 (k < 256).
<4> Round off the first decimal point of k to the nearest whole number.
If k becomes 256 after round-off, perform Step <2> again to set k to 128.
<5> Set the value of m to UAnCTL1 register and the value of k to the UAnCTL2 register.
Example: When f
XX = 32 MHz and target baud rate = 153,600 bps
<1> k = 32,000,000/(2 × 153,600) = 104.16…, m = 0
<2>, <3> k = 104.16… < 256, m = 0
<4> Set value of UAnCTL2 register: k = 104 = 68H, set value of UAnCTL1 register: m = 0
Actual baud rate = 32,000,000/(2 × 104)
= 153,846 [bps]
Baud rate error = {32,000,000/(2 × 104 × 153,600) − 1} × 100
= 0.160 [%]
The representative examples of baud rate settings are shown below.
Table 15-3. Baud Rate Generator Setting Data
Baud Rate fXX = 32 MHz fXX = 20 MHz fXX = 10 MHz
(bps) UAnCTL1 UAnCTL2 ERR (%) UAnCTL1 UAnCTL2 ERR (%) UAnCTL1 UAnCTL2 ERR (%)
300 08H D0H 0.16 08H 82H 0.16 07H 82H 0.16
600 07H D0H 0.16 07H 82H 0.16 06H 82H 0.16
1,200 06H D0H 0.16 06H 82H 0.16 05H 82H 0.16
2,400 05H D0H 0.16 05H 82H 0.16 04H 82H 0.16
4,800 04H D0H 0.16 04H 82H 0.16 03H 82H 0.16
9,600 03H D0H 0.16 03H 82H 0.16 02H 82H 0.16
19,200 02H D0H 0.16 02H 82H 0.16 01H 82H 0.16
31,250 02H 80H 0.00 01H A0H 0.00 00H A0H 0.00
38,400 01H D0H 0.16 01H 82H 0.16 00H 82H 0.16
76,800 00H D0H 0.16 00H 82H 0.16 00H 41H 0.16
153,600 00H 68H 0.16 00H 41H 0.16 00H 21H −1.36
312,500 00H 33H 0.39 00H 20H 0.00 00H 10H 0.00
625,000 00H 1AH −1.54 00H 10H 0.00 00H 08H 0.00
Remark f
XX: Main clock frequency
ERR: Baud rate error (%)