Datasheet

V850ES/JG3 CHAPTER 15 ASYNCHRONOUS SERIAL INTERFACE A (UARTA)
R01UH0015EJ0300 Rev.3.00 Page 464 of 870
Sep 30, 2010
15.6.3 SBF transmission
When the UAnCTL0.UAnPWR bit = UAnCTL0.UAnTXE bit = 1, the transmission enabled status is entered, and SBF
transmission is started by setting (to 1) the SBF transmission trigger (UAnOPT0.UAnSTT bit).
Thereafter, a low level the width of bits 13 to 20 specified by the UAnOPT0.UAnSLS2 to UAnOPT0.UAnSLS0 bits is
output. A transmission enable interrupt request signal (INTUAnT) is generated upon SBF transmission start. Following the
end of SBF transmission, the UAnSTT bit is automatically cleared. Thereafter, the UART transmission mode is restored.
Transmission is suspended until the data to be transmitted next is written to the UAnTX register, or until the SBF
transmission trigger (UAnSTT bit) is set.
Figure 15-8. SBF Transmission
INTUAnT
interrupt
TXDAn 12345678910111213
Stop
bit
Setting of UAnSTT bit