Datasheet

V850ES/JG3 CHAPTER 14 D/A CONVERTER
R01UH0015EJ0300 Rev.3.00 Page 442 of 870
Sep 30, 2010
CHAPTER 14 D/A CONVERTER
14.1 Functions
The D/A converter has the following functions.
8-bit resolution × 2 channels (DA0CS0, DA0CS1)
R-2R ladder method
Settling time: 3 μ s max. (when AVREF1 is 3.0 to 3.6 V and external load is 20 pF)
Analog output voltage: AVREF1 × m/256 (m = 0 to 255; value set to DA0CSn register)
Operation modes: Normal mode, real-time output mode
Remark n = 0, 1
14.2 Configuration
The D/A converter configuration is shown below.
Figure 14-1. Block Diagram of D/A Converter
DACS0 register
Selector
Selector
DACS1 register
ANO0 pin
ANO1 pin
DA0M.DACE0 bit
DA0M.DACE1 bit
DACS0 register write
DA0M.DAMD0 bit
INTTP2CC0 signal
DACS1 register write
DA0M.DAMD1 bit
INTTP3CC0 signal
AV
REF1 pin
AV
SS pin
Cautions 1. DAC0 and DAC1 share the AVREF1 pin.
2. DAC0 and DAC1 share the AV
SS pin. The AVSS pin is also shared by the A/D converter.