Datasheet

V850ES/JG3 CHAPTER 13 A/D CONVERTER
R01UH0015EJ0300 Rev.3.00 Page 432 of 870
Sep 30, 2010
(3) One-shot select mode
In this mode, the result of converting the voltage of the analog input pin specified by the ADA0S register is
compared with the set value of the ADA0PFT register. If the result of power-fail comparison matches the condition
set by the ADA0PFC bit, the conversion result is stored in the ADA0CRn register, and the INTAD signal is
generated. If it does not match, the conversion result is stored in the ADA0CRn register, and the INTAD signal is
not generated. Conversion is stopped after it has been completed.
Figure 13-10. Timing Example of One-Shot Select Mode Operation
(When Power-Fail Comparison Is Made: ADA0S Register = 01H)
ANI1
A/D conversion
Data 1
(ANI1)
Data 6
(ANI1)
Data 1 Data 2 Data 3
Data 4 Data
5
Data 6 Data 7
Data 1
(ANI1)
Data 6
(ANI1)
ADA0CR1
INTAD
Conversion start
Set ADA0CE bit = 1
Conversion start
Set ADA0CE bit = 1
ADA0PFT match
Conversion end
ADA0PFT unmatch
Conversion end
(4) One-shot scan mode
In this mode, the results of converting the voltages of the analog input pins sequentially selected from the ANI0 pin
to the pin specified by the ADA0S register are stored, and the set value of the ADA0CR0H register of channel 0 is
compared with the set value of the ADA0PFT register. If the result of power-fail comparison matches the condition
set by the ADA0PFC bit, the conversion result is stored in the ADA0CR0 register and the INTAD signal is generated.
If it does not match, the conversion result is stored in the ADA0CR0 register, and the INTAD0 signal is not
generated. After the result of the first conversion has been stored in the ADA0CR0 register, the results of
converting the signals on the analog input pins specified by the ADA0S register are sequentially stored. The
conversion is stopped after it has been completed.