Datasheet

V850ES/JG3 CHAPTER 13 A/D CONVERTER
R01UH0015EJ0300 Rev.3.00 Page 417 of 870
Sep 30, 2010
(5) A/D conversion result registers n, nH (ADA0CRn, ADA0CRnH)
The ADA0CRn and ADA0CRnH registers store the A/D conversion results.
These registers are read-only, in 16-bit or 8-bit units. However, specify the ADA0CRn register for 16-bit access and
the ADA0CRnH register for 8-bit access. The 10 bits of the conversion result are read from the higher 10 bits of the
ADA0CRn register, and 0 is read from the lower 6 bits. The higher 8 bits of the conversion result are read from the
ADA0CRnH register.
Caution Accessing the ADA0CRn and ADA0CRnH registers is prohibited in the following statuses. For
details, see 3.4.8 (2) Accessing specific on-chip peripheral I/O registers.
• When the CPU operates with the subclock and the main clock oscillation is stopped
• When the CPU operates with the internal oscillation clock
After reset: Undefined R Address: ADA0CR0 FFFFF210H, ADA0CR1 FFFFF212H,
ADA0CR2 FFFFF214H, ADA0CR3 FFFFF216H,
ADA0CR4 FFFFF218H, ADA0CR5 FFFFF21AH,
ADA0CR6 FFFFF21CH, ADA0CR7 FFFFF21EH,
ADA0CR8 FFFFF220H, ADA0CR9 FFFFF222H,
ADA0CR10 FFFFF224H, ADA0CR11 FFFFF226H
ADA0CRn
(n = 0 to 11)
AD9 AD8 AD7 AD6
AD0000000AD1AD2AD3AD4AD5
AD9ADA0CRnH
(n = 0 to 11)
AD8 AD7 AD6 AD5 AD4 AD3 AD2
76 54 32 1 0
After reset: Undefined R Address: ADA0CR0H FFFFF211H, ADA0CR1H FFFFF213H,
ADA0CR2H FFFFF215H, ADA0CR3H FFFFF217H,
ADA0CR4H FFFFF219H, ADA0CR5H FFFFF21BH,
ADA0CR6H FFFFF21DH, ADA0CR7H FFFFF21FH,
ADA0CR8H FFFFF221H, ADA0CR9H FFFFF223H,
ADA0CR10H FFFFF225H, ADA0CR11H FFFFF227H
Caution A write operation to the ADA0M0 and ADA0S registers may cause the contents of the
ADA0CRn register to become undefined. After the conversion, read the conversion result
before writing to the ADA0M0 and ADA0S registers. Correct conversion results may not
be read if a sequence other than the above is used.