Datasheet
V850ES/JG3 CHAPTER 11 FUNCTIONS OF WATCHDOG TIMER 2
R01UH0015EJ0300 Rev.3.00 Page 397 of 870
Sep 30, 2010
Table 11-2. Watchdog Timer 2 Clock Selection
WDCS24 WDCS23 WDCS22 WDCS21 WDCS20 Selected Clock 100 kHz (MIN.) 220 kHz (TYP.) 400 kHz (MAX.)
0 0 0 0 0 2
12
/fR 41.0 ms 18.6 ms 10.2 ms
0 0 0 0 1 2
13
/fR 81.9 ms 37.2 ms 20.5 ms
0 0 0 1 0 2
14
/fR 163.8 ms 74.5 ms 41.0 ms
0 0 0 1 1 2
15
/fR 327.7 ms 148.9 ms 81.9 ms
0 0 1 0 0 2
16
/fR 655.4 ms 297.9 ms 163.8 ms
0 0 1 0 1 2
17
/fR 1,310.7 ms 595.8 ms 327.7 ms
0 0 1 1 0 2
18
/fR 2,621.4 ms 1,191.6 ms 655.4 ms
0 0 1 1 1 2
19
/fR 5,242.9 ms 2,383.1 ms 1,310.7 ms
fXX = 32 MHz fXX = 20 MHz fXX = 10 MHz
0 1 0 0 0 2
18
/fXX 8.2 ms 13.1 ms 26.2 ms
0 1 0 0 1 2
19
/fXX 16.4 ms 26.2 ms 52.4 ms
0 1 0 1 0 2
20
/fXX 32.8 ms 52.4 ms 104.9 ms
0 1 0 1 1 2
21
/fXX 65.5 ms 104.9 ms 209.7 ms
0 1 1 0 0 2
22
/fXX 131.1 ms 209.7 ms 419.4 ms
0 1 1 0 1 2
23
/fXX 262.1 ms 419.4 ms 838.9 ms
0 1 1 1 0 2
24
/fXX 524.3 ms 838.9 ms 1,677.7 ms
0 1 1 1 1 2
25
/fXX 1,048.6 ms 1,677.7 ms 3,355.4 ms
fXT = 32.768 kHz
1
×
0 0 0 2
9
/fXT 15.625 ms
1
×
0 0 1 2
10
/fXT 31.25 ms
1
×
0 1 0 2
11
/fXT 62.5 ms
1
×
0 1 1 2
12
/fXT 125 ms
1
×
1 0 0 2
13
/fXT 250 ms
1
×
1 0 1 2
14
/fXT 500 ms
1
×
1 1 0 2
15
/fXT 1,000 ms
1
×
1 1 1 2
16
/fXT 2,000 ms
(2) Watchdog timer enable register (WDTE)
The counter of watchdog timer 2 is cleared and counting restarted by writing “ACH” to the WDTE register.
The WDTE register can be read or written in 8-bit units.
Reset sets this register to 9AH.
WDTE
After reset: 9AH R/W Address: FFFFF6D1H
Cautions 1. When a value other than “ACH” is written to the WDTE register, an overflow signal is
forcibly output.
2. When a 1-bit memory manipulation instruction is executed for the WDTE register, an
overflow signal is forcibly output.
3. To intentionally generate an overflow signal, write a value other than “ACH” to the WDTE
register only once, or write data to the WDTM2 register only twice.
However, when the watchdog timer 2 is set to stop operation, an overflow signal is not
generated even if data is written to the WDTM2 register only twice, or a value other than
“ACH” is written to the WDTE register only once.
4. The read value of the WDTE register is “9AH” (which differs from written value “ACH”).