Datasheet

V850ES/JG3 CHAPTER 10 WATCH TIMER FUNCTIONS
R01UH0015EJ0300 Rev.3.00 Page 387 of 870
Sep 30, 2010
10.3 Control Registers
The following registers are provided for the watch timer.
• Prescaler mode register 0 (PRSM0)
• Prescaler compare register 0 (PRSCM0)
• Watch timer operation mode register (WTM)
(1) Prescaler mode register 0 (PRSM0)
The PRSM0 register controls the generation of the watch timer count clock.
This register can be read or written in 8-bit or 1-bit units.
Reset sets this register to 00H.
0PRSM0 0 0 BGCE0 0 0 BGCS01 BGCS00
Disabled
Enabled
BGCE0
0
1
Main clock operation enable
f X
f X /2
f
X /4
f
X /8
5 MHz
200 ns
400 ns
800 ns
1.6 s
4 MHz
250 ns
500 ns
1 s
2 s
BGCS01
0
0
1
1
BGCS00
0
1
0
1
Selection of watch timer source clock (f
BGCS )
After reset: 00H R/W Address: FFFFF8B0H
μ
μ
< >
μ
Cautions 1. Do not change the values of the BGCS00 and BGCS01 bits during watch timer operation.
2. Set the PRSM0 register before setting the BGCE0 bit to 1.
3. Set the PRSM0 and PRSCM0 registers according to the main clock frequency that is used
so as to obtain an f
BRG frequency of 32.768 kHz.