Datasheet

V850ES/JG3 CHAPTRER 8 16-BIT TIMER/EVENT COUNTER Q (TMQ)
R01UH0015EJ0300 Rev.3.00 Page 372 of 870
Sep 30, 2010
(1) Operation flow in pulse width measurement mode
Figure 8-37. Software Processing Flow in Pulse Width Measurement Mode
<1> <2>
Set TQ0CTL0 register
(TQ0CE bit = 1)
TQ0CE bit = 0
Register initial setting
TQ0CTL0 register
(TQ0CKS0 to TQ0CKS2 bits),
TQ0CTL1 register,
TQ0IOC1 register,
TQ0IOC2 register,
TQ0OPT0 register
Initial setting of these registers
is performed before setting the
TQ0CE bit to 1.
The TQ0CKS0 to TQ0CKS2 bits can
be set at the same time when counting
has been started (TQ0CE bit = 1).
The counter is initialized and counting
is stopped by clearing the TQ0CE bit to 0.
START
STOP
<1> Count operation start flow
<2> Count operation stop flow
FFFFH
16-bit counter
0000H
TQ0CE bit
TIQ00 pin input
TQ0CCR0 register
INTTQ0CC0 signal
D 0 0000H 0000HD 1 D 2