Datasheet

V850ES/JG3 CHAPTRER 8 16-BIT TIMER/EVENT COUNTER Q (TMQ)
R01UH0015EJ0300 Rev.3.00 Page 338 of 870
Sep 30, 2010
Figure 8-25. Basic Timing in PWM Output Mode
D 0
D 1
D 2
D 3
D 1
D 2
D 3
D 0 D 0
D 1
D 2
D 3
D 0
D 1
D 2
D 3
D 0
D 1
D 2
D 3
FFFFH
16-bit counter
0000H
TQ0CE bit
TQ0CCR0 register
INTTQ0CC0 signal
TOQ00 pin output
TQ0CCR1 register
INTTQ0CC1 signal
TOQ01 pin output
TQ0CCR2 register
INTTQ0CC2 signal
TOQ02 pin output
TQ0CCR3 register
INTTQ0CC3 signal
TOQ03 pin output
Active level
width (D
3 )
Cycle (D
0 + 1) Cycle (D 0 + 1) Cycle (D 0 + 1) Cycle (D 0 + 1)
Active level
width (D
3 )
Active level
width (D 3 )
Active level
width (D 3 )
Active
level width
(D
1 )
Active
level width
(D
1 )
Active
level width
(D
1 )
Active
level width
(D
1 )
Active
level width
(D
2 )
Active
level width
(D
2 )
Active
level width
(D
2 )
Active
level width
(D
2 )