Datasheet

V850ES/JG3 CHAPTER 8 16-BIT TIMER/EVENT COUNTER Q (TMQ)
R01UH0015EJ0300 Rev.3.00 Page 325 of 870
Sep 30, 2010
(c) Conflict between trigger detection and match with CCRk buffer register
If the trigger is detected immediately after the INTTQ0CCk signal is generated, the 16-bit counter is
immediately cleared to 0000H, the output signal of the TOQ0k pin is asserted, and the counter continues
counting. Consequently, the inactive period of the PWM waveform is shortened.
16-bit counter
CCRk buffer register
INTTQ0CCk signal
TOQ0k pin output
External trigger input
(TIQ00 pin input)
D k
D k − 10000FFFF 0000
Shortened
D k
Remark k = 1 to 3
If the trigger is detected immediately before the INTTQ0CCk signal is generated, the INTTQ0CCk signal is not
generated, and the 16-bit counter is cleared to 0000H and continues counting. The output signal of the TOQ0k
pin remains active. Consequently, the active period of the PWM waveform is extended.
16-bit counter
CCRk buffer register
INTTQ0CCk signal
TOQ0k pin output
External trigger input
(TIQ00 pin input)
Dk
Dk − 2Dk − 1Dk0000FFFF 0000 0001
Extended
Remark k = 1 to 3