Datasheet

V850ES/JG3 CHAPTER 8 16-BIT TIMER/EVENT COUNTER Q (TMQ)
R01UH0015EJ0300 Rev.3.00 Page 314 of 870
Sep 30, 2010
If the set value of the TQ0CCRk register is greater than the set value of the TQ0CCR0 register, the
INTTQ0CCk signal is not generated because the count value of the 16-bit counter and the value of the
TQ0CCRk register do not match.
Remark k = 1 to 3
Figure 8-15. Timing Chart When D
01 < Dk1
D 01
D 11
D 21
L
L
L
D
31
D 01 D 01 D 01 D 01
FFFFH
16-bit counter
0000H
TQ0CE bit
TQ0CCR0 register
INTTQ0CC0 signal
TQ0CCR1 register
INTTQ0CC1 signal
TQ0CCR2 register
INTTQ0CC2 signal
TQ0CCR3 register
INTTQ0CC3 signal