Datasheet

V850ES/JG3 CHAPTER 8 16-BIT TIMER/EVENT COUNTER Q (TMQ)
R01UH0015EJ0300 Rev.3.00 Page 312 of 870
Sep 30, 2010
(c) Operation of TQ0CCR1 to TQ0CCR3 registers
Figure 8-13. Configuration of TQ0CCR1 to TQ0CCR3 Registers
CCR0 buffer register
TQ0CE bit
TQ0CCR0 register
Clear
Match signal
INTTQ0CC0 signal
INTTQ0CC3 signal
TIQ00 pin
TQ0CCR1
register
CCR1 buffer
register
Match signal
INTTQ0CC1 signal
TQ0CCR3
register
CCR3 buffer
register
Match signal
INTTQ0CC2 signal
TQ0CCR2
register
CCR2 buffer
register
Match signal
16-bit counter
Edge
detector