Datasheet

V850ES/JG3 CHAPTER 8 16-BIT TIMER/EVENT COUNTER Q (TMQ)
R01UH0015EJ0300 Rev.3.00 Page 303 of 870
Sep 30, 2010
(d) Operation of TQ0CCR1 to TQ0CCR3 registers
Figure 8-6. Configuration of TQ0CCR1 to TQ0CCR3 Registers
CCR0 buffer register
TQ0CE bit
TQ0CCR0 register
Clear
Match signal
INTTQ0CC0 signal
TOQ03 pin
INTTQ0CC3 signal
TOQ00 pin
TQ0CCR1
register
CCR1 buffer
register
Match signal
TOQ01 pin
INTTQ0CC1 signal
TQ0CCR3
register
CCR3 buffer
register
Match signal
TOQ02 pin
INTTQ0CC2 signal
TQ0CCR2
register
CCR2 buffer
register
Match signal
Output
controller
Count
clock
selection
Output
controller
Output
controller
Output
controller
16-bit counter