Datasheet

V850ES/JG3 CHAPTER 8 16-BIT TIMER/EVENT COUNTER Q (TMQ)
R01UH0015EJ0300 Rev.3.00 Page 295 of 870
Sep 30, 2010
(11) TMQ0 counter read buffer register (TQ0CNT)
The TQ0CNT register is a read buffer register that can read the count value of the 16-bit counter.
If this register is read when the TQ0CTL0.TQ0CE bit = 1, the count value of the 16-bit timer can be read.
This register is read-only, in 16-bit units.
The value of the TQ0CNT register is cleared to 0000H when the TQ0CE bit = 0. If the TQ0CNT register is read at
this time, the value of the 16-bit counter (FFFFH) is not read, but 0000H is read.
The value of the TQ0CNT register is cleared to 0000H after reset, as the TQ0CE bit is cleared to 0.
Caution Accessing the TQ0CNT register is prohibited in the following statuses. For details, see 3.4.8 (2)
Accessing specific on-chip peripheral I/O registers.
• When the CPU operates with the subclock and the main clock oscillation is stopped
• When the CPU operates with the internal oscillation clock
TQ0CNT
12 10 8 6 4 2
After reset: 0000H R Address: FFFFF54EH
14 0
13 11 9 7 5 3
15 1