Datasheet

V850ES/JG3 CHAPTER 8 16-BIT TIMER/EVENT COUNTER Q (TMQ)
R01UH0015EJ0300 Rev.3.00 Page 280 of 870
Sep 30, 2010
8.4 Registers
The registers that control TMQ0 are as follows.
• TMQ0 control register 0 (TQ0CTL0)
• TMQ0 control register 1 (TQ0CTL1)
• TMQ0 I/O control register 0 (TQ0IOC0)
• TMQ0 I/O control register 1 (TQ0IOC1)
• TMQ0 I/O control register 2 (TQ0IOC2)
• TMQ0 option register 0 (TQ0OPT0)
• TMQ0 capture/compare register 0 (TQ0CCR0)
• TMQ0 capture/compare register 1 (TQ0CCR1)
• TMQ0 capture/compare register 2 (TQ0CCR2)
• TMQ0 capture/compare register 3 (TQ0CCR3)
• TMQ0 counter read buffer register (TQ0CNT)
Remark When using the functions of the TIQ00 to TIQ03 and TOQ00 to TOQ03 pins, see Table 4-15 Using Port Pin
as Alternate-Function Pin.