Datasheet

V850ES/JG3 CHAPTRER 7 16-BIT TIMER/EVENT COUNTER P (TMP)
R01UH0015EJ0300 Rev.3.00 Page 269 of 870
Sep 30, 2010
Figure 7-36. Register Setting in Pulse Width Measurement Mode (1/2)
(a) TMPn control register 0 (TPnCTL0)
0/1 0 0 0 0
TPnCTL0
Select count clock
0: Stop counting
1: Enable counting
0/1 0/1 0/1
TPnCKS2 TPnCKS1 TPnCKS0TPnCE
(b) TMPn control register 1 (TPnCTL1)
00000
TPnCTL1
110
TPnMD2 TPnMD1 TPnMD0TPnEEETPnEST
1, 1, 0:
Pulse width measurement mode
(c) TMPn I/O control register 1 (TPnIOC1)
0 0 0 0 0/1
TPnIOC1
Select valid edge
of TIPn0 pin input
Select valid edge
of TIPn1 pin input
0/1 0/1 0/1
TPnIS2 TPnIS1 TPnIS0TPnIS3