Datasheet

V850ES/JG3 CHAPTRER 7 16-BIT TIMER/EVENT COUNTER P (TMP)
R01UH0015EJ0300 Rev.3.00 Page 245 of 870
Sep 30, 2010
(1) Operation flow in PWM output mode
Figure 7-27. Software Processing Flow in PWM Output Mode (1/2)
FFFFH
16-bit counter
0000H
TPnCE bit
TPnCCR0 register
CCR0 buffer register
INTTPnCC0 signal
TOPn0 pin output
TPnCCR1 register
CCR1 buffer register
INTTPnCC1 signal
TOPn1 pin output
D 10
D00
D00 D01 D00
D00
D10 D10 D11 D10
D10 D10 D11 D10
D01 D00
D 10 D 10
D00
D 10
D00D11D11
D01 D01 D01
<2> <3> <4> <5>
<1>
Remark n = 0 to 5
m = 0, 1