Datasheet

V850ES/JG3 CHAPTER 1 INTRODUCTION
R01UH0015EJ0300 Rev.3.00 Page 9 of 870
Sep 30, 2010
(10) Watchdog timer 2
A watchdog timer is provided on chip to detect inadvertent program loops, system abnormalities, etc.
The internal oscillation clock, the main clock, or the subclock can be selected as the source clock.
Watchdog timer 2 generates a non-maskable interrupt request signal (INTWDT2) or a system reset signal
(WDT2RES) after an overflow occurs.
(11) Serial interface
The V850ES/JG3 includes three kinds of serial interfaces: asynchronous serial interface A (UARTA), 3-wire
variable-length serial interface B (CSIB), and an I
2
C bus interface (I
2
C).
In the case of UARTA, data is transferred via the TXDA0 to TXDA2 pins and RXDA0 to RXDA2 pins.
In the case of CSIB, data is transferred via the SOB0 to SOB4 pins, SIB0 to SIB4 pins, and SCKB0 to SCKB4
pins.
In the case of I
2
C, data is transferred via the SDA00 to SDA02 and SCL00 to SCL02 pins.
(12) A/D converter
This 10-bit A/D converter includes 12 analog input pins. Conversion is performed using the successive
approximation method.
(13) D/A converter
A two-channel, 8-bit-resolution D/A converter that uses the R-2R ladder method is provided on chip.
(14) DMA controller
A 4-channel DMA controller is provided on chip. This controller transfers data between the internal RAM and on-
chip peripheral I/O devices in response to interrupt requests sent by on-chip peripheral I/O.
(15) Key interrupt function
A key interrupt request signal (INTKR) can be generated by inputting a falling edge to key input pins (8 channels).
(16) Real-time output function
The real-time output function transfers preset 6-bit data to output latches upon the occurrence of a timer compare
register match signal.
(17) CRC function
A CRC operation circuit that generates 16-bit CRC (cyclic redundancy check) codes for data in 8-bit units is
provided.
(18) DCU (debug control unit)
An on-chip debug function that uses the JTAG (Joint Test Action Group) communication specifications is provided.
Switching between the normal port function and on-chip debugging function is done with the control pin input
level and the OCDM register.