Datasheet

V850ES/JG3 CHAPTER 7 16-BIT TIMER/EVENT COUNTER P (TMP)
R01UH0015EJ0300 Rev.3.00 Page 213 of 870
Sep 30, 2010
If the set value of the TPnCCR1 register is greater than the set value of the TPnCCR0 register, the count value
of the 16-bit counter does not match the value of the TPnCCR1 register. Consequently, the INTTPnCC1 signal
is not generated, nor is the output of the TOPn1 pin changed.
Figure 7-8. Timing Chart When D
01 < D11
FFFFH
16-bit counter
0000H
TPnCE bit
TPnCCR0 register
TOPn0 pin output
INTTPnCC0 signal
TPnCCR1 register
TOPn1 pin output
INTTPnCC1 signal
D01
D11
D01 D01 D01 D01
L
Remark n = 0 to 5