Datasheet

V850ES/JG3 CHAPTER 7 16-BIT TIMER/EVENT COUNTER P (TMP)
R01UH0015EJ0300 Rev.3.00 Page 203 of 870
Sep 30, 2010
7.5 Operation
TMPn can perform the following operations.
Operation
TPnCTL1.TPnEST Bit
(Software Trigger Bit)
TIPn0 Pin
(External Trigger Input)
Capture/Compare
Register Setting
Compare Register
Write
Interval timer mode Invalid Invalid Compare only Anytime write
External event count mode
Note 1
Invalid Invalid Compare only Anytime write
External trigger pulse output mode
Note 2
Valid Valid Compare only Batch write
One-shot pulse output mode
Note 2
Valid Valid Compare only Anytime write
PWM output mode Invalid Invalid Compare only Batch write
Free-running timer mode Invalid Invalid Switching enabled Anytime write
Pulse width measurement mode
Note 2
Invalid Invalid Capture only Not applicable
Notes 1. To use the external event count mode, specify that the valid edge of the TIPn0 pin capture trigger input is not
detected (by clearing the TPnIOC1.TPnIS1 and TPnIOC1.TPnIS0 bits to “00”).
2. When using the external trigger pulse output mode, one-shot pulse output mode, and pulse width
measurement mode, select the internal clock as the count clock (by clearing the TPnCTL1.TPnEEE bit to 0).
Remark n = 0 to 5