Datasheet

V850ES/JG3 CHAPTER 6 CLOCK GENERATION FUNCTION
R01UH0015EJ0300 Rev.3.00 Page 175 of 870
Sep 30, 2010
CHAPTER 6 CLOCK GENERATION FUNCTION
6.1 Overview
The following clock generation functions are available.
Main clock oscillator
• In clock-through mode
f
X = 2.5 to 10 MHz (fXX = 2.5 to 10 MHz)
• In PLL mode
f
X = 2.5 to 5 MHz (×4: fXX = 10 to 20 MHz)
f
X = 2.5 to 4 MHz (×8: fXX = 20 to 32 MHz)
Subclock oscillator
• f
XT = 32.768 kHz
Multiply (×4/×8) function by PLL (Phase Locked Loop)
• Clock-through mode/PLL mode selectable
Internal oscillator
• f
R = 220 kHz (TYP.)
Internal system clock generation
• 7 steps (f
XX, fXX/2, fXX/4, fXX/8, fXX/16, fXX/32, fXT)
Peripheral clock generation
Clock output function
Remark f
X: Main clock oscillation frequency
fXX: Main clock frequency
f
XT: Subclock frequency
f
R: Internal oscillation clock frequency