Datasheet

V850ES/JG3 CHAPTER 5 BUS CONTROL FUNCTION
R01UH0015EJ0300 Rev.3.00 Page 151 of 870
Sep 30, 2010
5.3 Memory Block Function
The 16 MB external memory space is divided into memory blocks of (lower) 2 MB, 2 MB, 4 MB, and 8 MB. The
programmable wait function and bus cycle operation mode for each of these blocks can be independently controlled in
one-block units.
Figure 5-1. Data Memory Map: Physical Address
(64 KB)
Use prohibited
Memory block 3
(8 MB)
Internal ROM area
Note 2
(1 MB)
External memory area
Note 1
(1 MB)
Internal RAM area
(60 KB)
On-chip peripheral
I/O area (4 KB)
Memory block 2
(4 MB)
Memory block 1
(2 MB)
Memory block 0
(2 MB)
03FFFFFFH
03FF0000H
03FEFFFFH
01000000H
00FFFFFFH
00800000H
007FFFFFH
00400000H
003FFFFFH
00200000H
001FFFFFH
00000000H
03FFFFFFH
03FFF000H
03FFEFFFH
001FFFFFH
00100000H
000FFFFFH
00000000H
03FF0000H
External memory area
Note 1
Notes 1. The V850ES/JG3 has 22 address pins, and the external memory area is viewed as a repetition of an
image of 4 MB.
2. This area is an external memory area in the case of a data write access.