Datasheet
R01UH0015EJ0300 Rev.3.00 Page 138 of 888
Sep 30, 2010
V850ES/JG3 CHAPTER 4 PORT FUNCTIONS
Table 4-15. Using Port Pin as Alternate-Function Pin (2/7)
Alternate FunctionPin
Name
Name I/O
Pnx Bit of
Pn Register
PMnx Bit of
PMn Register
PMCnx Bit of
PMCn Register
PFCEnx Bit of
PFCEn Register
PFCnx Bit of
PFCn Register
Other Bits
(Registers)
TIP10 Input
P34 = Setting not required PM34 = Setting not required
PMC34 = 1 − PFC34 = 0 P34
TOP10 Output
P34 = Setting not required PM34 = Setting not required
PMC34 = 1 − PFC34 = 1
TIP11 Input
P35 = Setting not required PM35 = Setting not required
PMC35 = 1 − PFC35 = 0 P35
TOP11 Output
P35 = Setting not required PM35 = Setting not required
PMC35 = 1 − PFC35 = 1
TXDA2 Output
P38 = Setting not required PM38 = Setting not required
PMC38 = 1 − PFC38 = 0 P38
SDA00 I/O
P38 = Setting not required PM38 = Setting not required
PMC38 = 1 − PFC38 = 1 PF38 (PF3) = 1
RXDA2 Input
P39 = Setting not required PM39 = Setting not required
PMC39 = 1 − PFC39 = 0 P39
SCL00 I/O
P39 = Setting not required PM39 = Setting not required
PMC39 = 1 − PFC39 = 1 PF39 (PF3) = 1
SIB0 Input
P40 = Setting not required PM40 = Setting not required
PMC40 = 1 − PFC40 = 0 P40
SDA01 I/O
P40 = Setting not required PM40 = Setting not required
PMC40 = 1 − PFC40 = 1 PF40 (PF4) = 1
SOB0 Output
P41 = Setting not required PM41 = Setting not required
PMC41 = 1 − PFC41 = 0 P41
SCL01 I/O
P41 = Setting not required PM41 = Setting not required
PMC41 = 1 − PFC41 = 1 PF41 (PF4) = 1
P42 SCKB0 I/O
P42 = Setting not required PM42 = Setting not required
PMC42 = 1 − −
TIQ01 Input
P50 = Setting not required PM50 = Setting not required
PMC50 = 1 PFCE50 = 0 PFC50 = 1 KRM0 (KRM) = 0
KR0 Input
P50 = Setting not required PM50 = Setting not required
PMC50 = 1 PFCE50 = 0 PFC50 = 1 TQ0TIG2, TQ0TIG3 (TQ0IOC1) = 0
TOQ01 Output
P50 = Setting not required PM50 = Setting not required
PMC50 = 1 PFCE50 = 1 PFC50 = 0
P50
RTP00 Output
P50 = Setting not required PM50 = Setting not required
PMC50 = 1 PFCE50 = 1 PFC50 = 1
TIQ02 Input
P51 = Setting not required PM51 = Setting not required
PMC51 = 1 PFCE51 = 0 PFC51 = 1 KRM1 (KRM) = 0
KR1 Input
P51 = Setting not required PM51 = Setting not required
PMC51 = 1 PFCE51 = 0 PFC51 = 1 TQ0TIG4, TQ0TIG5 (TQ0IOC1) = 0
TOQ02 Output
P51 = Setting not required PM51 = Setting not required
PMC51 = 1 PFCE51 = 1 PFC51 = 0
P51
RTP01 Output
P51 = Setting not required PM51 = Setting not required
PMC51 = 1 PFCE51 = 1 PFC51 = 1
TIQ03
Input
P52 = Setting not required PM52 = Setting not required
PMC52 = 1 PFCE52 = 0 PFC52 = 1 KRM2 (KRM) = 0
KR2 Input
P52 = Setting not required PM52 = Setting not required
PMC52 = 1 PFCE52 = 0 PFC52 = 1 TQ0TIG6, TQ0TIG7 (TQ0I0C1) = 0
TOQ03 Output
P52 = Setting not required PM52 = Setting not required
PMC52 = 1 PFCE52 = 1 PFC52 = 0
RTP02 Output
P52 = Setting not required PM52 = Setting not required
PMC52 = 1 PFCE52 = 1 PFC52 = 1
P52
DDI Input
P52 = Setting not required PM52 = Setting not required PMC52 = Setting not required PFCE52 = Setting not required PFC52 = Setting not required
OCDM0 (OCDM) = 1