Datasheet

CHAPTER 16 3-WIRE VARIABLE-LENGTH SERIAL I/O (CSIB).................................................... 484
16.1 Mode Switching of CSIB and Other Serial Interfaces ....................................................... 484
16.1.1 CSIB4 and UARTA0 mode switching.......................................................................................484
16.1.2 CSIB0 and I
2
C01 mode switching ............................................................................................485
16.2 Features................................................................................................................................. 485
16.3 Configuration ........................................................................................................................ 486
16.4 Registers ............................................................................................................................... 488
16.5 Interrupt Request Signals.................................................................................................... 495
16.6 Operation............................................................................................................................... 496
16.6.1 Single transfer mode (master mode, transmission mode)........................................................496
16.6.2 Single transfer mode (master mode, reception mode) .............................................................498
16.6.3 Single transfer mode (master mode, transmission/reception mode) ........................................500
16.6.4 Single transfer mode (slave mode, transmission mode) ..........................................................502
16.6.5 Single transfer mode (slave mode, reception mode)................................................................504
16.6.6 Single transfer mode (slave mode, transmission/reception mode)...........................................506
16.6.7 Continuous transfer mode (master mode, transmission mode)................................................508
16.6.8 Continuous transfer mode (master mode, reception mode) .....................................................510
16.6.9 Continuous transfer mode (master mode, transmission/reception mode) ................................513
16.6.10 Continuous transfer mode (slave mode, transmission mode) ..................................................517
16.6.11 Continuous transfer mode (slave mode, reception mode)........................................................519
16.6.12 Continuous transfer mode (slave mode, transmission/reception mode)...................................522
16.6.13 Reception error ........................................................................................................................526
16.6.14 Clock timing .............................................................................................................................527
16.7 Output Pins ........................................................................................................................... 529
16.8 Baud Rate Generator............................................................................................................ 530
16.8.1 Baud rate generation ...............................................................................................................531
16.9 Cautions ................................................................................................................................ 532
CHAPTER 17 I
2
C BUS .......................................................................................................................... 533
17.1 Mode Switching of I
2
C Bus and Other Serial Interfaces ................................................... 533
17.1.1 UARTA2 and I
2
C00 mode switching.........................................................................................533
17.1.2 CSIB0 and I
2
C01 mode switching ............................................................................................534
17.1.3 UARTA1 and I
2
C02 mode switching.........................................................................................535
17.2 Features................................................................................................................................. 536
17.3 Configuration ........................................................................................................................ 537
17.4 Registers ............................................................................................................................... 541
17.5 I
2
C Bus Mode Functions....................................................................................................... 557
17.5.1 Pin configuration ......................................................................................................................557
17.6 I
2
C Bus Definitions and Control Methods .......................................................................... 558
17.6.1 Start condition..........................................................................................................................558
17.6.2 Addresses................................................................................................................................559
17.6.3 Transfer direction specification ................................................................................................560
17.6.4 ACK .........................................................................................................................................561
17.6.5 Stop condition ..........................................................................................................................562
17.6.6 Wait state.................................................................................................................................563
17.6.7 Wait state cancellation method ................................................................................................565
17.7 I
2
C Interrupt Request Signals (INTIICn) .............................................................................. 566
17.7.1 Master device operation...........................................................................................................566
17.7.2 Slave device operation (when receiving slave address data (address match))........................569
17.7.3 Slave device operation (when receiving extension code).........................................................573