Technical information

Section 3 Software Specifications when Using the SH72546RFCC, SH72544R, SH72543R, SH72531, and SH72531FCC

Rev. 2.00 Feb. 18, 2009 Page 70 of 94

REJ10J1938-0200

Table 3.17 Measurement Item

Selected Name Option

Disabled None

Elapsed time AC

Branch instruction counts BT

Number of execution instructions I

Number of execution 32bit-instructions I32

Exception/interrupt counts EA

Interrupt counts INT

Data cache-miss counts DC

Instruction cache-miss counts IC

All area access counts ARN

All area instruction access counts ARIN

All area data access counts ARND

Cacheable area access counts CDN (data access)

Cacheable area instruction access counts CIN

Non cacheable area data access counts NCN

URAM area access counts UN

URAM area instruction access counts UIN

URAM area data access counts UDN

Internal I/O area data access counts IODN

Internal ROM area access counts RN

Internal ROM area instruction access counts RIN

Internal ROM area data access counts RDN

All area access cycle ARC

All area instruction access cycle ARIC

All area data access cycle ARDC

All area access stall ARS

All area instruction access stall ARIS

All area data access stall ARDS

Notes: 1. In the non-realtime trace mode of the AUD trace, normal counting cannot be performed

because the generation state of the stall or the execution cycle is changed.

2. For SH72546RFCC, SH72544R, or SH72543R, do not set measurement items for the

cache-miss counts, cacheable area, or non-cacheable area.