User`s manual

15
5. If the settings of the Event condition or the sequential conditions are changed during
execution of the program, execution will be suspended. (The number of clocks to be
suspended during execution of the program is a maximum of about 52 bus clocks (Bφ).
If the bus clock (Bφ) is 10.0 MHz, the program will be suspended for 5.2 μs.)
6. If the settings of Event conditions or the sequential conditions are changed during
execution of the program, the emulator temporarily disables all Event conditions to
change the settings. During this period, no Event condition will be satisfied.
7. When the emulator is being connected, the user break controller (UBC) function is not
available.
2.2.2 Trace Functions
The emulator supports the internal trace function with four branch sources and destinations.
The AUD trace is not available for this MCU.
2.2.3 Notes on Using the JTAG (H-UDI) Clock (TCK)
1. Set the JTAG clock (TCK) frequency to 1/4 or lower than the frequency of the peripheral clock
(Pφ) and to 2 MHz or more.
2. The initial value of the JTAG clock (TCK) is 2.5 MHz.
3. A value to be set for the JTAG clock (TCK) is initialized after executing [Reset CPU] or
[Reset Go]. Thus the TCK value will be 2.5 MHz.
2.2.4 Notes on Setting the [Breakpoint] Dialog Box
1. When an odd address is set, the next lowest even address is used.
2. A BREAKPOINT is accomplished by replacing instructions of the specified address.
It cannot be set to the following addresses:
• An area other than CS, the internal RAM, and the internal flash memory
• An instruction in which Break Condition 2 is satisfied
• A slot instruction of a delayed branch instruction
3. During step operation, specifying BREAKPOINTs and Event Condition breaks are disabled.
4. When execution resumes from the address where a BREAKPOINT is specified and a break
occurs before Event Condition execution, single-step operation is performed at the address
before execution resumes. Therefore, realtime operation cannot be performed.