User`s manual

Table 2.3 Watchdog Timer Registers

TCSR (R) Read Watchdog timer control/status register

TCNT (R) Read Watchdog timer counter

RSTCSR (R) Read Reset control/status register

TCSR (W) Write Watchdog timer control/status register

TCNT (W) Write Watchdog timer counter

RSTCSR (W) Write Reset control/status register

• The internal I/O registers can be accessed from the [IO] window. After the I/O-register

definition file is created, the MCU’s specification may be changed. If each I/O register in

the I/O-register definition file differs from addresses described in the hardware manual,

change the I/O-register definition file according to the description in the hardware manual.

The I/O-register definition file can be customized depending on its format. Note that,

however, the emulator does not support the bit-field function.

• Verify

In the [IO] window, the verify function of the input value is disabled.

11. Illegal Instructions

If illegal instructions are executed by STEP-type commands, the emulator cannot go to the

next program counter.

12. Interrupts

All interrupts except for NMI are masked during user program break.

13. When accessing the reserved memory area, use the [Memory] window; do not use other

windows.

14. Processing Time for Updating the Flash Memory Contents

When the contents of the flash memory area is modified by the program loading, memory

window, or memory command, or when a software break is set, a waiting time will be

generated to write or read the flash memory before executing the user program.

The processing time for updating the flash memory contents will be about a maximum of 60

seconds under the following environments (reference values):

Host computer: 500 MHz (Pentium

III)

SH7047F: 40 MHz (system clock frequency)