User`s manual

SuperH Family E10A-USB Emulator for Multi-core Microcomputers Section 6 Tutorial SH-2A
R20UT0363EJ0500 Rev. 5.00 Page 206 of 296
Aug 10, 2012
Flash memory
(32 Mbytes)
A0-A22
SHxxxx
CE0
CE1,2
OE
WE
D0-D7
D8-D15
D0-D7
D8-D15
D0-D7
D8-D15
D0-D7
D8-D15
FPGA
FIA bus buffer
FIA bus buffer
FD bus buffer
A2-A24
CS0
CS2
RD
WE0
D0-D31
GND
0-7
8-15
16-23
24-31
Figure 6.57 Flash Memory Wiring
Table 6.5 Sample Program Specifications
Item Contents
RAM area to be used H'0C001000 to H'0C0015BF
Write module start address H'0C001100
Erase module start address H'0C001000
 Since the SDRAM is used, the bus controller must be set.
 Set the options on the [Loading flash memory] page in the [Configuration] dialog box as
follows: