User`s manual

SuperH Family E10A-USB Emulator for Multi-core Microcomputers Section 5 Debugging
R20UT0363EJ0500 Rev. 5.00 Page 118 of 296
Aug 10, 2012
[F-Bus, CPU1] : Trace information is acquired with F-bus
access by CPU1 as a condition.
[None] : No conditions are set.
: Set the conditions for acquisition of the internal trace information. [Acquisition]
[Read] : Trace information is acquired on reading.
[Write] : Trace information is acquired on writing.
[PC relative addressing] : Trace information is acquired with the
execution address.
[Branch] : Trace information is acquired on the
branch.
[Software] : Software tracing is a condition.
[Data access] : Trace information is acquired on data
access
[Instruction Fetch] : Trace information is acquired on cycles of
instruction fetching.
[When trace
buffer full]
: Specify the operation when the trace buffer is completely full.
[Trace continue] : Keep acquiring trace information. The
earliest contents of the trace buffer are
overwritten.
[Trace stop] : Stop trace acquisition.
[Break (CPU0)] : Break CPU0.
[Break (CPU1)] : Break CPU1.
[Break (CPU0, CPU1)] : Break CPU0 and CPU1.