User`s manual

SuperH™ Family E10A-USB Emulator Section 2 Software Specifications when Using the Emulator
R20UT2188EJ0100 Rev. 1.00 Page 8 of 24
Aug 09, 2012
5. Direct Memory Access Controller (DMAC)
The DMAC operates even when the emulator is used. When a data transfer request is
generated, the DMAC executes DMA transfer.
6. Memory Access during User Program Execution
During execution of the user program, memory is accessed by the following two methods, as
shown in table 2.2.
Table 2.2 Memory Access during User Program Execution
Method Description
H-UDI read/write The stopping time of the user program is short because memory is
accessed by the dedicated bus master.
Short break This method is not available for this product (do not set short break).
The method for accessing memory during execution of the user program is specified by using
the [Configuration] dialog box.
Table 2.3 Stopping Time by Memory Access (Reference)
Method Condition Stopping Time
H-UDI read/write Reading of one longword for the
internal RAM
Reading: Maximum three bus clocks
(Bφ)
Writing of one longword for the
internal RAM
Writing: Maximum two bus clocks
(Bφ)
Short break CPU clock: 100 MHz
JTAG clock: 20 MHz
Reading or writing of one longword
for the external area
About 50 ms
7. Memory Access to the External Flash Memory Area
The emulator can download the load module to the external flash memory area (for details,
refer to section 6.22, Download Function to the Flash Memory Area, in the SuperH
TM
Family
E10A-USB Emulator User’s Manual). Other memory write operations are enabled for the
RAM area. Therefore, an operation such as memory write or BREAKPOINT should be set
only for the RAM area.
8. ROM Cache
For ROM cache in the MCU, the emulator operates as shown in table 2.4.
Table 2.4 Operation for ROM Cache
Function Operation
Write and erase of the flash memory Writes or erases all contents of
ROM cache.
Download of the program to the flash memory
Memory read Accesses the disabled cache
area to read the content of
internal flash memory.
9. Using WDT
The WDT does not operate during break.