User`s manual

SuperH Family E10A-USB Emulator Section 2 Emulator Functions
R20UT0870EJ1000 Rev. 10.00 Page 14 of 292
Aug 10, 2012
Table 2.4 [Trace Window] Display Contents
Trace Type Type Column BUS Column R/W Column Address Column Data Column
Branch
trace
BRANCH
*1
No display No display Branch source
address
*1
No display
DESTINATION No display No display Branch destination
address
No display
Memory-
range
access
trace
MEMORY No display Read/write Memory access
address
Memory
access data
*1
Software
trace
S_TRACE No display No display Trace(x) function
execution address
Variable x
data
System bus
trace
MEMORY No display Read/write Memory access
address
Memory
access data
(write only)
*1
Data lost
*2
LOST No display No display No display No display
CPU wait
generation
*2
CPU-WAIT No display No display No display No display
Notes: 1. Not displayed when the PPC option is in use.
2. According to the device being debugged, there may be no output for the [Lost] or
[CPU-WAIT] type. In such a case, it is not possible to clarify whether the trace data
was not output in time or the CPU generated a wait state for the output trace data.
2.2.3 Memory Output Function of Trace Data
In some devices to be debugged, trace data can be written to the specified memory range. The
data is read from the memory range written in the [Trace] window and the result is then displayed.
Note: Do not specify the program area as the memory in the specified range is overwritten.