User`s manual
SuperH Family E10A-USB Emulator Appendix E I/O File Format
R20UT0870EJ1000 Rev. 10.00 Page 283 of 292
Aug 10, 2012
E.2 File Format (Bit Field Supported)
Each module name must be defined in the [Modules] definition section and the numbering of each
module must be sequential. Each module corresponds to a register definition section and within
the section each entry defines an I/O register.
The user must define “FileVersion=2” at the start of the section. It means that this I/O register file
is described with the version that supports the bit field.
The [BaseAddress] definition is for devices where the location of I/O registers moves in the
address space depending on the CPU mode. In this case, the [BaseAddress] value is the base
address of the I/O registers in one specific mode and the addresses used in the register definitions
are the address locations of the registers in the same mode. When the I/O register file is actually
used, the [BaseAddress] value is subtracted from the defined register address and the resultant
offset added to the relevant base address for the selected mode.
Each module has a section that defines the registers forming it along with an optional dependency.
The dependency is checked to see if the module is enabled or not. Each register name must be
defined in the section and the numbering of each register must be sequential. The dependency is
entered in the section as dep=<reg> <bit> <value>.
1. <reg> is the register id of the dependency.
2. <bit> is the bit position within the register.
3. <value> is the value that the bit must be for the module to be enabled.
The [Register] definition entry is entered in the format id=<name> <address> [<size>
[<absolute>[<format>[<bitfields>]]]].
1. <name> register name to be displayed.
2. <address> address of the register.
3. <size> which may be B, W, or L for byte, word, or longword (default is byte).
4. <absolute> which can be set to A if the register is at an absolute address. This is
only relevant if the I/O area address range moves about on the CPU in different
modes. In this case, if a register is defined as absolute the base address offset
calculation is not performed and the specified address is used directly.