Technical information

ManualsBrandsRenesas ManualsNetwork CardSingle-Chip Microcomputer SH7203

ROAD

MAP

SELECTION

MAP

R8A66580

R8A66597/

M66596

M66592/

M66591/

M66291

SH7724/

SH7722/

SH7723

H8SX/

1665/

1655

SH7262/

SH7264

SH7670/

SH7764

SH7285/

SH7286

SH7763/

SH7760

SH7720/

SH7721

SH7727/

SH7705

SH7216

SH7265/

SH7205/

SH7263/

SH7203

H8SX/1668R/

1668M

H8SX/1658R/

1658M

H8SX/

1653/

1663/

H8S/2472

H8S/2456R

2456/2454

H8S/2212

2215/2218

M16C/6CM30245

38K0

38K2

USB IP/

ZENER

DIODE

DEVELOPMENT

ENVIRONMENT

EVALUATION

PRODUCTS

EVALUATION

BOARD

ROAD

MAP

SELECTION

MAP

R8A66580

R8A66597/

M66596

M66592/

M66591/

M66291

SH7724/

SH7722/

SH7723

H8SX/

1665/

1655

SH7262/

SH7264

SH7670/

SH7764

SH7285/

SH7286

SH7763/

SH7760

SH7720/

SH7721

SH7727/

SH7705

SH7216

SH7265/

SH7205/

SH7263/

SH7203

H8SX/1668R/

1668M

H8SX/1658R/

1658M

H8SX/

1653/

1663/

H8S/2472

H8S/2456R

2456/2454

H8S/2212

2215/2218

M16C/6CM30245

38K0

38K2

USB IP/

ZENER

DIODE

DEVELOPMENT

ENVIRONMENT

EVALUATION

PRODUCTS

EVALUATION

BOARD

The H8SX/1668R/1668M Group incorporates low

voltage detection circuit and power-on reset in

addition to the functions of H8SX/1665/1655 Group.

The usability has been improved to reduce the

external parts.

The H8SX/1668R/1668M Group and the H8SX/1658R/1658M Group

mount high-speed "H8SX CPU" core with 50MHz maximum operation

frequencies and incorporate the 1MB/512KB/384KB large-capacity flash

memory and 56KB/40KB RAM. This H8SX/1663/1653 product Group

offers pin function upward compatibility and peripheral functions such as

AD, TPU and EXDMAC, are strengthened. In addition, H8SX/1668M and

H8SX/1658M have an LVD/POR function that allows the reduction of

external parts. The system development is simple and allows the USB

module to process USB standard commands and virtually automatic USB

state using the hardware. Three types of transfer modes (Control, Bulk and

Interrupt) are supported and with a bulk Endpoint engineered with a double

buffer composition, the high-speed data transmission becomes a reality.

bit

USB

Function

Full-Speed

USB2.0

USB Function

1 port

Speed

FIFO

64 (Max)*

288 (Total)*

Endpoint (Pipe)

4 Endpoints

Isochronous Transfer

Not Supported

H8SX/1665 Group block diagram

H8SX-CPU

@50MHz

ROM

FLASH

RAM

INTC

BSC

SDRAM I/F added

TMR (8-bit timer):

8ch

DAC

10bit:2ch

32KHz

Sub-clock

ＰＬＬ

WDT

DTC

I/O Port

C:2ch

UBC

TPU (16-bit timer) 6ch

PPG 16bit

DMAC:4ch

EXDMAC:4ch

ADC10bit:4ch

SCI:6ch

H-UDI

JTAG I/F

The H8SX/1653/1663 Group incorporates abundant

peripheral functions such as high-end H8SX CPU

core and USB communications in a compact package.

The USB communications with PC and the system

control are balances.

The H8SX/1653/1663 Group mounts a high-speed "H8SX CPU"

core with 50MHz maximum operation frequencies and incorporates

512K/384KB large-capacity flash memory and 40KB RAM. This

H8SX/1653/1663 product group offers abundant peripheral functions

such as data transfer function, SCI (Smart Card I/F, supporting

High-Speed SCI), timer, A/D, D/A. The system development is

simple and allows the USB module to process USB standard

commands and virtually automatic USB state using the hardware.

Three types of transfer modes (Control, Bulk and Interrupt) are

supported and with a bulk Endpoint engineered with a double buffer

composition, the high-speed data transmission becomes a reality.

Full-Speed USB2.0 Function

H8SX Family

H8SX/1653/1663 Group

bit

The H8S/2472 Group is a single chip MCU with built-in

Flash/RAM, which realizes Ether communications.

It can be applied as a gateway of Ethernet and USB.

The H8S/2472 Group is embedded with high-speed CPU

with 34MHz (at four times greater than 8.5MHz) operation,

512KB large-capacity flash memory and 40KB RAM. The

system development is simple and allows the USB module to

process USB standard commands and virtually automatic

USB state using the hardware. Three types of transfer modes

(Control, Bulk and Interrupt) are supported and with a bulk

Endpoint engineered with a double buffer composition, the

high-speed data transmission becomes a reality. The on-chip

emulator E10A-USB conforming to JTAGI/F is also prepared

to provide the development with a cheaper development tool.

Full-Speed USB2.0 Function

H8S Family

H8S/2472 Group

USB

Function

Full-Speed

USB2.0

Full-Speed USB2.0 Function

H8SX Family

H8SX/1668R/1668M Group

H8SX/1658R/1658M Group

R5F61668R*50FPV

R5F61668M*50FPV

R5F61664R*50FPV

R5F61664M*50FPV

R5F61663R*50FPV

R5F61663M*50FPV

R5F61668R*50BGV

R5F61668M*50BGV

R5F61664R*50BGV

R5F61664M*50BGV

R5F61663R*50BGV

R5F61663M*50BGV

R5F61658R*50FPV

R5F61658M*50FPV

R5F61654R*50FPV

R5F61654M*50FPV

R5F61653R*50FPV

R5F61653M*50FPV

PinPart Number Package Package Code

Memory capacity (Byte)

ROM Type*

Supply Voltage

(V)

Operating

Temperature (°C)

Clock

(MHz)

ROM

144

176

120

LQFP

BGA

LQFP

PLQP0144KA-A

PLBG0176GA-A

PLQP0120LA-A

Ｆ

3.0 to 3.6

−20 to 75（−40 to 85）

512K

384K

512K

384K

512K

384K

56K

40K

56K

40K

56K

40K

RAM

* F: Flash memory version, L: ROM-less version, M: Mask ROM version, O: One-time PROM version

*1. The number of bytes settable for one pipe. The total doubles when using the double buffer mode.

*2. Total number of built-in FIFO.

*: Clarifying quality grade

USB

Function

Full-Speed

USB2.0

USB Function

1 port

Speed

FIFO

64 (Max)*

288 (Total)*

Endpoint (Pipe)

4 Endpoints

Isochronous Transfer

Not Supported

Block diagram

INTC

RAM

PPG

DMAC:4ch

SCI:6ch

H-UDI

TPU (16-bit timer)

6ch

ADC

10bit:8ch

H8SX-CPU

@50MHz

ROM

FLASH

Clock

Oscillator

TMR (8-bit timer):

8ch

C:2ch

BSC

SDRAM I/F added

PLL

WDT

DTC

DAC

8bit:2ch

I/O Port

32KHz

Sub-clock

R5F61653*50FTV

R5F61654*50FTV

R5F61664*50FPV

R5F61663*50FPV

384K

512K

384K

512K

40K

PinPart Number Package Package Code

Memory capacity (Byte)

ROM Type*

Supply Voltage

（V）

Operating

Temperature (°C)

Clock

(MHz)

Cache memory

120 LQFP PTQP0120LA-A Ｆ 3.0 to 3.6

−20 to 75（−40 to 85）

144 LQFP PLQP0144KA-A Ｆ 3.0 to 3.6

−20 to 75（−40 to 85）

RAM

*: Clarifying quality grade* F: Flash memory version, L: ROM-less version, M: Mask ROM version, O: One-time PROM version

*1. The number of bytes settable for one pipe. The total doubles when using the double buffer mode. *2. Total number of built-in FIFO.

*: Clarifying quality grade

bit

USB Function

1 port

Speed

FIFO

64 (Max)*

288 (Total)*

Endpoint (Pipe)

4 Endpoints

Isochronous Transfer

Not Supported

Block diagram

C-Bus:6ch

EtherC

LPC

H8S-CPU

BSC

Multiplier

CRC calculation circuit

DTC

SCI:2ch

SCI with FIFO: 1ch

Synchronous Serial

Communication Unit: 1ch

A/D

10bit:8ch

Boundary scan

INTC

TMR (16-bit timer): 12ch

TMR (8-bit timer): 2ch

14-bit PWM Timer: 4ch

WDT:2ch

Clock

Oscillator

ROM RAM

PLL

I/O port

R4F2472VBR*V

176

PinPart Number Package

BGA

Package Code

PLBG0176GA-A

Memory capacity (Byte)

ROM Type*

Ｆ

Supply Voltage

（V）

3.0 to 3.6

Operating

Temperature (°C)

−20 to 75（−40 to 85）

Clock

(MHz)

34512K

ROM

40K

RAM

* F: Flash memory version, L: ROM-less version, M: Mask ROM version, O: One-time PROM version

*1. The number of bytes settable for one pipe. The total doubles when using the double buffer mode. *2. Total number of built-in FIFO.

Supported

application

Car accessory

Mobile

device

PC peripheral

equipment

OA equipment

Industrial

instrument

Digital AV

equipment

Electronic

music instrument

Communication

equipment

Supported

application

Car accessory

Mobile

device

PC peripheral

equipment

OA equipment

Industrial

instrument

Digital AV

equipment

Electronic

music instrument

Communication

equipment

Supported

application

Car accessory

Mobile

device

PC peripheral

equipment

OA equipment

Industrial

instrument

Digital AV

equipment

Electronic

music instrument

Communication

equipment