Specifications
SH7670 Group Example of Cache Memory Setting
R01AN0300EJ0101 Rev. 1.01 Page 8 of 12
Oct. 15, 2010
3. Sample Program Listing
3.1 Sample program list "main.c" (1)
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/******************************************************************************
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* Copyright (C) 2007(2010) Renesas Electronics Corporation. All rights reserved.
*""FILE COMMENT""*********** Technical reference data **************************
* System Name : SH7671 Sample Program
* File Name : main.c
* Abstract : sample of cache memory setting
* Version : 1.01.03
* Device : SH7671
* Tool-Chain : High-performance Embedded Workshop (Ver.4.03.00).
* : C/C++ compiler package for the SuperH RISC engine family
* : (Ver.9.01 Release01).
* OS : None
* H/W Platform: M3A-HS71(CPU board)
* Description :
********************************************************************************
* History : Jul.05,2007 ver.1.00.00
* : Jul.09,2007 ver.1.01.00 Revision of the section allocation
* : Jan.17,2008 ver.1.01.01 Revision of comment
* : Feb.28,2008 ver.1.01.02 Revision of a macro name
* : May 10,2010 ver.1.01.03 Changed the company name and device name
*""FILE COMMENT END""**********************************************************/
#include <machine.h>
#include "iodefine.h" /* iodefine.h is a file automatically generated by the
High-performance Embedded Workshop */
#include "defs.h"