User`s manual

Functional Overview
2.2 CPU
Rev.1.01 Jan 31, 2008
2-3
REJ10J1262-0101
2
2.2 CPU
The M3A-HS11 contains the 32-bit RISC microcomputer SH7211 that operates with a maximum 160MHz of CPU
clock frequency. The SH7211 includes 512-Kbyte flash memory, and 32-Kbyte RAM, making it useful in a wide range
of applications from data processing to equipment control.
The M3A-HS11 can be operated with a maximum 160MHz of CPU clock frequency (external bus 40MHz, max)
using a 10MHz input clock. Figure 2.2.1 shows the SH7211 block diagram in the M3A-HS11.
MDCLK2
MDCLK0
EXTAL
XTAL
PB3/CKIO
FWE
MD1
MD0
RES
NMI
WDTOVF
AN0
AN1
AN2
AN3
AN4
AN5
AN6
AN7
SH7211
PA0/A0
PA1/A1
PA2/A2
PA3/A3
PA4/A4
PA5/A5
PA6/A6
PA7/A7
PA8/A8
PA9/A9
PA10/A10
PA11/A11
PA12/A12
PA13/A13
PA14/A14
PA15/SCK3/A15
PA16/RXD3/A16
PA17/TXD3/A17
PA18/IRQ0/A18
PA19/IRQ1/A19
PA20/IRQ2/A20
PA21/IRQ3/A21
PA22/TIOC0A/IRQ4/A22
PA23/SCK1/TIOC0B/IRQ5/A23
PA24/RXD1/TIOC0C/IRQ6/A24
PA25/TXD1/TIOC0D/IRQ7/A25
PB10/RXD2/TIOC4CS/WAIT/DREQ3
PB11/TXD2/TIOC4DS/AH/DACK3
PB12/TXD2/TIOC4AS/BREQ
PB13/SCK2/TIOC4BS/BACK
PB20/TIOC3DS/BS
PB21/TIOC3BS/RXD0/IRQ0/CS2
PB15/TIOC3C/IRQ5/CS5
PB19/TIOC3D/IRQ6/CS6
PB28/RXD3/TIOC1A/DACK0
PB29/TIOC1B/DREQ0
PB0/RXD0/POE0/RD
PB1/TXD0/POE8/RD/WR
PB2/SCK0/POE4/CS0
PB4/TIOC4A/CKE
PB5/TIOC4B/IRQ2/RASL
PB6/TIOC4C/IRQ3/CASL
PB7/TIOC4D/IRQ7/CS7
PB8/RXD3/TIOC3AS/WE0/DQMLL
PB9/TXD3/TIOC3CS/WE1/WE/DQMLU
PB14/RXD2/ADTRG/MRES
PB16/TXD0/POE1/CS1
PB17/TIOC3A/IRQ1/CS3
PB18/TIOC3B/IRQ4/CS4
Clock Mode 6
Fixed
Clock
Mode
System
Control
User
LED
DIP
Switch
for User
PF0/SCL/POE7/IRQ0
PF1/SDA/POE3/IRQ1
EEPROM
I/F
A/D
DA0
DA1
D/A
Address Bus
PD0/D0
PD1/D1
PD2/D2
PD3/D3
PD4/D4
PD5/D5
PD6/D6
PD7/D7
PD8/D8
PD9/D9
PD10/D10/TIC5W
PD11/D11/TIC5V
PD12/D12/TIC5U
PD13/D13/TIC5WS
PD14/D14/TIC5VS
PD15/D15/TIC5US
Data Bus
TDI
TDO
TCK
TMS
TRST
ASEMD
PB30/ASEBRKAK/ASEBRK/UBCTRG/IRQOUT
H-UDI
Serial
Port
PB22/AUDSYNC/RXD2/TCLKD/DACK2/FRAME
PB23/AUDCK/TXD2/TCLKC/DREQ2
PB24/AUDATA3/RXD3/TCLKB/IRQ2/TEND1
PB25/AUDATA2/TXD3/TCLKA/IRQ3/DACK1
PB26/AUDATA1/SCK3/TIOC2B/DREQ1
PB27/AUDATA0/TXD3/TIOC2A/TEND0
AUD
Figure 2.2.1 SH7211 Block Diagram