REJ10J1264-0400 SH-2A, SH-2 E200F Emulator Additional Document for User’s Manual Supplementary Information on Using the SH7211 Renesas Microcomputer Development Environment System SuperH™ Family / SH7210 Series E200F for SH7211 Group R0E572110EMU00E Rev.4.00 Revision Date: Mar.
Notes regarding these materials 1. This document is provided for reference purposes only so that Renesas customers may select the appropriate Renesas products for their use. Renesas neither makes warranties or representations with respect to the accuracy or completeness of the information contained in this document nor grants any license to any intellectual property rights or any other rights of Renesas or any third party with respect to the information in this document. 2.
Contents Section 1 System Configuration ........................................................................1 1.1 1.2 Components of the Emulator ............................................................................................ 1 System Configuration ....................................................................................................... 4 Section 2 Connecting the Emulator to the User System ....................................7 2.1 2.2 2.3 2.4 2.5 2.6 2.7 2.8 2.
3.1 3.2 Differences between the SH7211 and the Emulator ......................................................... 43 Specific Functions for the Emulator when Using the SH7211 ......................................... 50 3.2.1 Event Condition Functions .................................................................................. 50 3.2.2 Trace Functions ................................................................................................... 57 3.2.
Section 1 System Configuration 1.1 Components of the Emulator The E200F emulator supports the SH7211. Table 1.1 lists the components of the emulator. Table 1.1 Components of the Emulator Classification Component Hardware Emulator main unit AC adapter Appearance Quantity 1 Remarks R0E0200F1EMU00: Depth: 185.0 mm, Width: 130.0 mm, Height: 45.0 mm, Mass: 321.0 g Product numbers: 0001 to 0113 1 Input: 100 to 240 V Output: 12 V 4.0 A Depth: 120.0 mm, Width: 72.0 mm, Height: 27.0 mm, Mass: 400.
Table 1.1 Components of the Emulator (cont) Classification Component Hardware (cont) USB cable External probe Appearance Quantity Remarks 1 Length: 1500 mm, Mass: 50.
Table 1.2 Optional Components of the Emulator Classification Component Hardware Appearance Quantity Remarks External bus trace unit 1 R0E0200F1ETU00: Depth: 90.0 mm, Width: 125.0 mm, Height: 15.2 mm, Mass: 100 g Emulation memory unit (Memory capacity: 8 Mbytes or 16 Mbytes) 1 EV-chip unit 1 R0E0200F1MSR00 (8 Mbytes), R0E0200F1MSR01 (16 Mbytes): Depth: 90.0 mm, Width: 125.0 mm, Height: 15.
1.2 System Configuration Figure 1.1 shows an example of the emulator system configuration. - When the EV-chip unit is not used: Expansion profiling unit High-performance Embedded Workshop USB 2.0/1.1 External bus trace unit E200F User system H-UDI and AUD Trace cable PC - When the EV-chip unit is used: Expansion profiling unit Trace cable External bus trace unit High-performance Embedded Workshop Emulation memory unit USB 2.0/1.
Table 1.
Table 1.
Section 2 Connecting the Emulator to the User System 2.1 Connecting the Emulator to the User System When the emulator is connected to the user system, use the optional EV-chip unit, user system interface board, and trace cable. 2.2 Connecting the Emulator to the User System by Using the EV-chip Unit The following describes how to connect the emulator to the EV-chip unit, external bus trace unit, emulation memory unit, trace cable, and user system interface board. 2.2.
Figure 2.
• Connect the EV-chip unit to the trace cable (CN1 side). Figure 2.2 Connecting the Trace Cable to the EV-chip Unit CAUTION Check the location of pin 1 before connecting.
2.2.2 • Connecting the E200F External Bus Trace Unit to the EV-chip Unit When the external bus trace unit is used with the EV-chip unit, connect the external bus trace unit to the EV-chip unit as shown in figure 2.3. Figure 2.
• After checking the location of pin 1, connect the EV-chip unit, external bus trace unit, and trace cable. Figure 2.4 Connecting the EV-chip Unit, External Bus Trace Unit, and Trace Cable CAUTION Check the location of pin 1 before connecting.
2.2.3 • Connecting the Probe Head to the EV-chip Unit Connect the probe head to the EV-chip unit as shown in figure 2.5. Figure 2.5 Connecting the Probe Head to the EV-chip Unit CAUTION Check the location of pin 1 before connecting.
2.2.4 • Connecting the E200F Emulation Memory Unit to the EV-chip Unit When the emulation memory unit is used with the EV-chip unit, connect the emulation memory unit to the EV-chip unit (figure 2.6). Figure 2.
• After checking the location of pin 1, connect the EV-chip unit, emulation memory unit, and trace cable. Figure 2.7 Connecting the Emulation Memory Unit, EV-chip Unit, and Trace Cable CAUTION Check the location of pin 1 before connecting.
2.2.5 Connecting the E200F External Bus Trace Unit, Emulation Memory Unit, and EVchip Unit • When the external bus trace unit is used with the emulation memory unit and EV-chip unit, as shown in figure 2.8, connect them in the positions of (a), (b), and (c) for the external bus trace unit, emulation memory unit, and EV-chip unit, respectively. • After checking the location of pin 1, connect the external bus trace unit, emulation memory unit, and EV-chip unit. Figure 2.
2.2.6 • Connecting the EV-chip Unit to the User System Interface Board After checking the location of pin 1, connect the EV-chip unit to the user system interface board. EV-chip unit Connector No. EV-Chip Unit Connector No. User I/F Connector 1 (CN3) User I/F Connector 2 (CN4) Board Connector No. UCN1 UCN2 Board Spacer User system Figure 2.9 Connecting User System Interface Board to EV-Chip Unit CAUTION Check the location of pin 1 before connecting. Notes: 1.
2.3 Connecting the Emulator to the User System by Using the H-UDI Port Connector To connect the E200F emulator (hereinafter referred to as the emulator), the H-UDI port connector must be installed on the user system to connect the user system interface cable. When designing the user system, refer to the recommended circuit between the H-UDI port connector and the MCU. It is impossible to connect the emulator to the 14-pin type connector that is recommended for the E10A-USB emulator.
2.4 Installing the H-UDI Port Connector on the User System Table 2.2 shows the recommended H-UDI port connectors for the emulator. Table 2.2 Recommended H-UDI Port Connectors Connector Type Number Manufacturer Specifications 36-pin connector DX10M-36S Hirose Electric Co., Ltd. Screw type DX10M-36SE, DX10G1M-36SE Lock-pin type Note: When designing the 36-pin connector layout on the user board, do not connect any components under the H-UDI connector. 2.
Pin No. Signal Input/ Output*1 Pin No. Note Output 1 AUDCK 2 GND 3 AUDATA0 19 Output Signal Input/ Output*1 TMS Input 20 GND 21 _TRST 22 (GND)*4 23 TDI 24 GND *2 4 GND 5 AUDATA1 6 GND 7 AUDATA2 8 GND 9 AUDATA3 10 GND 28 GND 11 _AUDSYNC*2 Output 29 UVCC 12 GND 30 GND 13 N.C. 31 _RES*2 14 GND 32 GND 15 N.C. 33 GND *3 16 GND 34 GND 35 N.C.
2.6 Recommended Circuit between the H-UDI Port Connector and the MCU 2.6.1 Recommended Circuit (36-Pin Type) Figure 2.11 shows a recommended circuit for connection between the H-UDI and AUD port connectors (36 pins) and the MCU when the emulator is in use. Notes: 1. Do not connect anything to the N.C. pins of the H-UDI port connector. 20 2. The _ASEMD pin must be 0 when the emulator is connected and 1 when the emulator is not connected, respectively.
PVcc = I/O power supply All pulled-up at 4.7 kΩ PVcc PVcc PVcc PVcc H-UDI port connector (36-pin type) 2 GND AUDCK GND AUDATA0 4 6 8 10 GND GND GND 16 18 AUDATA2 AUDATA3 GND AUDSYNC GND N.C. GND N.C. GND TCK GND TMS 20 22 24 26 (GND) GND 30 32 TRST TDI GND TDO GND ASEBRKAK /ASEBRK GND UVCC GND RES GND GND GND N.C.
2.7 Connecting the E200F External Bus Trace Unit with the User System To use the external bus trace function in the emulator, the emulator and the user system must be connected via the external bus trace unit (R0E0200F1ETU00). Install the connector on the user system for connection of the external bus trace unit, referring to section 2.8, Installing the External Bus Trace Unit Connector, in this manual.
2.8.3 Recommended Foot Pattern 2-φ1.05NTH 4.76 Pin 1 Pin 179 2-φ2.2NTH 0.64 Screw hole 1.45 3.09 7.62 1.05 4.76 58.48 Pin 2 0.50 0.31 Pin 180 Unit: mm Figure 2.13 Recommended Foot Pattern (on which the Connector is Installed) 2.8.4 Restrictions on Component Installation Fastens the trace unit board and the user system E200F trace unit board 16 mm 13 mm Connector (QTH-090-04-L-D-A) User system Figure 2.
2.8.5 Pin Assignments of the External Bus Trace Unit Connector Table 2.4 shows the pin assignments of the external bus trace unit connector. Table 2.4 Pin Assignments of the External Bus Trace Unit Connector E200F Trace I/F SH7211 Pin I/O Connector Signal No. (CONT) Pin Name Name Voltage Meaning of Signal Note 1 I UA-P0 A0 3.3 V Address bus Connect the address signal of the MPU. 2 I UA-P1 A1 3.3 V Address bus Same as above. 3 I UA-P2 A2 3.3 V Address bus Same as above.
Table 2.4 Pin Assignments of the External Bus Trace Unit Connector (cont) E200F Trace I/F SH7211 Pin I/O Connector Signal No. (CONT) Pin Name Name Voltage Meaning of Signal Note 26 I UA-P21 A21 3.3 V Address bus Same as above. 27 I UA-P22 A22 3.3 V Address bus Same as above. 28 I UA-P23 A23 3.3 V Address bus Same as above. 29 - GND GND GND 30 - GND GND GND 31 I UA-P24 A24 3.3 V Address bus Connect the address signal of the MPU. 32 I UA-P25 A25 3.
Table 2.4 Pin Assignments of the External Bus Trace Unit Connector (cont) E200F Trace I/F SH7211 Pin I/O Connector Signal No. (CONT) Pin Name Name Voltage Meaning of Signal Note 54 IO UD-P11 D11 3.3 V Data bus Same as above. 55 IO UD-P12 D12 3.3 V Data bus Same as above. 56 IO UD-P13 D13 3.3 V Data bus Same as above. 57 IO UD-P14 D14 3.3 V Data bus Same as above. 58 IO UD-P15 D15 3.3 V Data bus Same as above.
Table 2.4 Pin Assignments of the External Bus Trace Unit Connector (cont) E200F Trace I/F SH7211 Pin I/O Connector Signal No. (CONT) Pin Name Name Voltage 82 IO UD-P33 _RASU 3.3 V 83 84 IO IO UD-P34 UD-P35 _CASL _CASU 3.3 V 3.3 V Meaning of Signal Note SDRAM _RASU Connect the _RASU signal of the MPU (fix signal _RASU to high level when it is not used). SDRAM _CASL Connect the _CASL signal of the MPU (fix signal _CASL to high level when it is not used).
Table 2.4 Pin Assignments of the External Bus Trace Unit Connector (cont) E200F Trace I/F SH7211 Pin I/O Connector Signal No. (CONT) Pin Name Name Voltage Meaning of Signal Note 104 IO UD-P51 IRQ3 3.3 V Interrupt Connect the IRQ3 signal of the MPU (fix IRQ3 to high level when it is not used). 105 IO UD-P52 IRQ4 3.3 V Interrupt Connect the IRQ4 signal of the MPU (fix IRQ4 to high level when it is not used). 106 IO UD-P53 IRQ5 3.
Table 2.4 Pin Assignments of the External Bus Trace Unit Connector (cont) E200F Trace I/F SH7211 Pin I/O Connector Signal No. (CONT) Pin Name Name Voltage 123 I UCONT-P2 _WE2/ 3.3 V _DQMLU Meaning of Signal Note Upper-byte write Connect the _WE2 signal of the MPU (fix _WE2 signals/upper-byte to high level when it is not used). signals of SDRAM (D23-D16) 124 125 I I UCONT-P3 UCONT-P4 _WE3 _RD 3.3 V 3.
Table 2.4 Pin Assignments of the External Bus Trace Unit Connector (cont) E200F Trace I/F SH7211 Pin I/O Connector Signal No. (CONT) Pin Name Name Voltage 142 I UCONT-P21 _WAIT 3.3 V 143 144 I I UCONT-P22 UCONT-P23 _BREQ NMI 3.3 V 3.3 V Meaning of Signal Note Hardware wait Connect the _WAIT signal of the MPU (fix request _WAIT to high level when it is not used). Bus mastership Connect the _BREQ signal of the MPU (fix request _BREQ to high level when it is not used).
Table 2.4 Pin Assignments of the External Bus Trace Unit Connector (cont) E200F Trace I/F SH7211 Pin I/O Connector Signal No. (CONT) Pin Name Name Voltage Meaning of Signal Note 167 I CS4IN-N _CS4 3.3 V Chip select signal Same as above. 168 I CS5IN-N _CS5 3.3 V Chip select signal Same as above. 169 I CS6IN-N _CS6 3.3 V Chip select signal Same as above. 170 I CS7IN-N _CS7 3.3 V Chip select signal Same as above. 171 I CS8IN-N _CS8 3.
2.8.6 Layout of the External Bus Trace Unit Connector When designing the user system, there are restrictions on the position to install the external bus trace unit connector. Figure 2.15 shows the external dimensions of the external bus trace unit. The size of the printed-circuit board of the E200F external bus trace unit is 90 mm × 125 mm. The size of components around the user system connector must not exceed the limit on component installation (the height must be 10 mm or less). 10 1 17.
Notes: 1. The external bus trace interface connector installed on the user system must be as close to the MCU as possible. 2. Wiring pattern of clock lines (CKO) The followings are notes on wiring of clock lines for the E200F trace interface signals. Take them into consideration when designing the user system to embed suitable clock lines. (a) Clock lines must be as short as possible. (b) Clock lines must be surrounded by the GND pattern for protection so that the signals will be of low-impedance.
2.9 Connecting the External Bus Trace Unit to the User System This section describes how to connect the external bus trace unit and emulation memory unit to the user system. 2.9.1 Connecting the E200F External Bus Trace Unit to the Emulator Main Unit • Open the cover of TRACE I/F on the side of the main unit case. • Connect the trace cable provided for the external bus trace unit to the emulator as shown in figure 2.16. Figure 2.
• Connect the external bus trace unit to the trace cable (CN1 side). Figure 2.
2.9.2 • Connecting the E200F External Bus Trace Unit to the User System After checking the location of pin 1, connect the user system to the external bus trace unit. Figure 2.18 Connecting the User System to the External Bus Trace Unit CAUTION Check the location of pin 1 before connecting. Note: Connection of the signals differs depending on the MCU used.
2.9.3 Connecting the E200F Emulation Memory Unit to the Emulator Main Unit • Open the cover of TRACE I/F on the side of the main unit case. • Connect the trace cable provided for the external bus trace unit to the emulator as shown in figure 2.19. Figure 2.
• Connect the emulation memory unit to the trace cable (CN1 side). Figure 2.
2.9.4 • Connecting the Emulation Memory Unit to the User System After checking the location of pin 1, connect the user system to the emulation memory unit. Figure 2.21 Connecting the User System to the Emulation Memory Unit CAUTION Check the location of pin 1 before connecting. Note: Connection of the signals differs depending on the MCU used.
2.9.5 Connecting the E200F External Bus Trace Unit, Emulation Memory Unit, and User System • When the external bus trace unit is used with the emulation memory unit, firstly connect the external bus trace unit to the emulation memory unit (figure 2.22) and then to the user system. Figure 2.
• After checking the location of pin 1, connect the external bus trace unit, emulation memory unit, and trace cable. Figure 2.
• After checking the location of pin 1, connect the external bus trace unit, emulation memory unit, and user system. Figure 2.24 Connecting the External Bus Trace Unit, Emulation Memory Unit, and User System CAUTION Check the location of pin 1 before connecting. Note: Connection of the signals differs depending on the MCU used. For installation and pin assignments of the user system connector, refer to section 2.8, Installing the External Bus Trace Unit Connector.
Section 3 Software Specifications when Using the SH7211 3.1 Differences between the SH7211 and the Emulator 1. When the emulator system is initiated, it initializes the general registers and part of the control registers as shown in table 3.1. The initial values of the actual SH7211 registers are undefined. When the emulator is initiated from the workspace, a value to be entered is saved in a session. Table 3.
4. Reset Signals The SH7211 reset signals are only valid during emulation started with clicking the GO or STEP-type button. If these signals are enabled on the user system in command input wait state, they are not sent to the SH7211. Note: Do not break the user program when the _RES, _BREQ, or _WAIT signal is being low. A TIMEOUT error will occur. If the _BREQ or _WAIT signal is fixed to low during break, a TIMEOUT error will occur at memory access. 5.
7. Memory Access to the External Flash Memory Area The emulator can download the load module to the external flash memory area (for details, refer to section 6.21, Download Function to the Flash Memory Area, in the SH-2A, SH-2 E200F Emulator User’s Manual). Other memory write operations are enabled for the RAM area. Therefore, an operation such as memory write or a BREAKPOINT should be set only for the RAM area. 8. ROM Cache For ROM cache in the MCU, the emulator operates as shown in table 3.4. Table 3.
9. Multiplexing the AUD Pins in On-Chip Debugging Mode The AUD pins are multiplexed as shown in table 3.5. Table 3.
Table 3.6 Registers and Values Set for the AUD Function Pin Name of the Port Function AUD Function Register and Bit to be Set Value to be Set PB23 AUDCK PBCRH2[10:8] 3’b110 PB22 _AUDSYNC PBCRH2[10:8] 3’b110 PB24 AUDATA3 PBCRH2[10:8] 3’b110 PB25 AUDATA2 PBCRH2[10:8] 3’b110 PB26 AUDATA1 PBCRH2[10:8] 3’b110 PB27 AUDATA0 PBCRH2[10:8] 3’b110 Note that the AUD function can be used regardless of the above AUD pin settings in EV-chip unit debugging mode. 10.
12. [IO] Window • Display and modification For each watchdog timer register, there are two registers to be separately used for write and read operations. Table 3.
14. Reset Input During execution of the user program, the emulator may not operate correctly if a contention occurs between the following operations for the emulator and the reset input to the target device: • Setting an Event Condition • Setting an internal trace • Displaying the content acquired by an internal trace • Reading or writing of a memory Note that those operations should not contend with the reset input to the target device. 15.
3.2 Specific Functions for the Emulator when Using the SH7211 In on-chip debugging mode, a reset must be input when the emulator is activated. 3.2.1 Event Condition Functions The emulator is used to set event conditions for the following three functions: • Break of the user program • Internal trace • Start or end of performance measurement Table 3.8 lists the types of Event Condition. Table 3.
Table 3.9 lists the combinations of conditions that can be set under Ch1 to Ch11 and the software trace. Table 3.
The [Event Condition 11] dialog box is used to specify the count of [Event Condition 1] and becomes a reset point when the sequential condition is specified. Sequential Setting: Use the [Combination action(Sequential or PtoP)] dialog box to specify the sequential condition and the start or end of performance measurement. Table 3.
Table 3.10 Conditions to Be Set (cont) Classification Item Description [Ch1, 2, 3] list box (cont) Ch2 to Ch1 PA Sets the performance measurement period during the time from the satisfaction of the condition set in Event Condition 2 (start condition) to the satisfaction of the condition set in Event Condition 1 (end condition).
Usage Example of Sequential Break Extension Setting: A tutorial program provided for the product is used as an example. For the tutorial program, refer to section 6, Tutorial, in the SH-2A, SH-2 E200F Emulator User’s Manual. The conditions of Event Condition are set as follows: 1. Ch1 Breaks address H’00001086 when the condition [Prefetch address break after executing] is satisfied. 2. Ch2 Breaks address H’00001068 when the condition [Prefetch address break after executing] is satisfied. 3.
Figure 3.1 [Source] Window at Execution Halt (Sequential Break) If the sequential condition, performance measurement start/end, or point-to-point for the internal trace is set, conditions of Event Condition to be used will be disabled. Such conditions must be enabled from the popup menu by clicking the right mouse button on the [Event Condition] sheet. Notes: 1.
6. If a condition of which intervals are satisfied closely is set, no sequential condition will be satisfied. • Set the Event conditions, which are satisfied closely, by the program counter with intervals of two or more instructions. • After the Event condition has been matched by accessing data, set the event condition by the program counter with intervals of 17 or more instructions. 7.
3.2.2 Trace Functions The emulator supports the trace functions listed in table 3.11. Table 3.11 Trace Functions Function Internal Trace AUD Trace Branch trace Supported Supported Memory access trace Supported Supported Software trace Not supported Supported The internal and AUD traces are set in the [I-Trace/AUD-Trace acquisition] dialog box of the [Trace] window.
Internal Trace Function: When [I-Trace] is selected for [Trace type] on the [Trace mode] page of the [I-Trace/AUD-Trace acquisition] dialog box, the internal trace can be used. Figure 3.
The following three items can be selected as the internal trace from [Type] of [I-Trace mode]. Table 3.12 Information on Acquiring the Internal Trace Item Acquisition Information [M-Bus & Branch] Acquires the data and branch information on the M-bus. • Data access (read/write) • PC-relative access • Branch information [I-Bus] Acquires the data on the I-bus.
Using the Event Condition restricts the condition; the following three items are set as the internal trace conditions. Table 3.13 Trace Conditions of the Internal Trace Item Acquisition Information Trace halt Acquires the internal trace until the Event Condition is satisfied. (The trace content is displayed in the [Trace] window after a trace has been halted. No break occurs in the user program.) Trace acquisition Acquires only the data access where the Event Condition is satisfied.
Set the address condition as H’2000 in the [Event Condition 5] dialog box. Set [I-Trace] as [Ch4 to Ch5 PtoP] in the [Combination action (Sequential or PtoP)] dialog box. When point-to-point and trace acquisition condition are set simultaneously, they are ANDed. Notes on Internal Trace: • Timestamp The timestamp is the clock counts of Bφ (48-bit counter). Table 3.14 shows the timing for acquiring the timestamp. Table 3.
• Trace acquisition condition Do not set the trace-end condition for the SLEEP instruction and the branch instruction according to which the delay slot becomes the SLEEP instruction. When [I-BUS, M-Bus & Branch] is selected and the trace acquisition condition is set for the M-bus and I-bus with the Event Condition, set the M-bus condition and the I-bus condition for [Event Condition 1] and [Event Condition 2], respectively.
AUD Trace Functions: This function is operational when the AUD pins of the MCU are connected to the emulator. Table 3.15 shows the AUD trace acquisition mode that can be set in each trace function. Table 3.15 AUD Trace Acquisition Mode Type Mode Description Continuous trace occurs Realtime trace When the next branching occurs while the trace information is being output, all the information may not be output. The user program can be executed in realtime, but some trace information will be lost.
Figure 3.3 [Trace mode] Page When the AUD trace function is used, select the [AUD function] radio button in the [Trace type] group box of the [Trace mode] page.
(a) Branch Trace Function The branch source and destination addresses and their source lines are displayed. Branch trace can be acquired by selecting the [Branch trace] check box in the [AUD function] group box of the [Trace mode] page. The branch type can be selected in the [AUD Branch trace] page. Figure 3.
(b) Window Trace Function Memory access in the specified range can be acquired by trace. Two memory ranges can be specified for channels A and B. The read, write, or read/write cycle can be selected as the bus cycle for trace acquisition. Setting Method: (i) Select the [Channel A] and [Channel B] check boxes in the [AUD function] group box of the [Trace mode] page. Each channel will become valid.
Figure 3.
Note: When [M-BUS] or [I-BUS] is selected, the following bus cycles will be traced. • M-BUS: A bus cycle generated by the CPU is acquired. • I-BUS: A bus cycle generated by the CPU or DMA is acquired. (c) Software Trace Function Note: This function can be supported with SuperH C/C++ compiler (manufactured by Renesas Technology Corp.; including OEM and bundle products) V7.0 or later.
7. The AUD trace is disabled while the profiling function is used. 8. If breaks occur immediately after executing non-delayed branch and TRAPA instructions and generating a branch due to exception or interrupt, a trace for one branch will not be acquired immediately before such breaks. However, this does not affect on generation of breaks caused by a BREAKPOINT and a break before executing instructions of Event Condition. 3.2.3 Notes on Using the JTAG (H-UDI) Clock (TCK) and AUD Clock (AUDCK) 1.
7. If you wish to use a BREAKPOINT (software break), specify the SH2A_SBSTK command to enable use of a user stack before setting a PC break. While enabled, extra four bytes of a user stack are used when a break occurs. The value of the stack pointer (R15) must be correctly set in advance because a user stack is to be used. By default, use of a user stack is disabled. For details on the command, refer to the help file. • Example To enable use of a user stack: >SH2A_SBSTK enable 3.2.
(a) Specifying the measurement start/end conditions The measurement start/end conditions are specified by using Event Condition 1,2. The [Ch1,2,3] list box of the [Combination action] dialog box can be used. Table 3.
For measurement tolerance, • The measured value includes tolerance. • Tolerance will be generated before or after a break. Note: When [Ch2 to Ch1 PA] or [Ch1 to Ch2 PA] is selected, to execute the user program, specify conditions set in Event Condition 2 and Event Condition 1 and one or more items for performance measurement. (b) Measurement item Items are measured with [Channel 1 to 4] in the [Performance Analysis] dialog box. Maximum four conditions can be specified at the same time. Table 3.
Table 3.
Notes: 1. In the non-realtime trace mode of the AUD trace, normal counting cannot be performed because the generation state of the stall or the execution cycle is changed. 2. If the internal ROM is not installed on the product, do not set the measurement item for the internal ROM area. 3. For SH7211, do not set measurement items for the cache-miss counts, cacheable area, or non-cacheable area. 2.
Section 4 User System Interface Circuits 4.1 User System Interface Circuits Figures 4.1 through 4.6 show user system interface circuits. Use them as a reference to determine the value of the pull-up resistance. User system SH7211 MD1 MD0 MD_CLK2 MD_CLK0 MD2 EP1K100FC N.C. MD1 MD0 MD_CLK2 MD_CLK0 MD2 Figure 4.
User system SH7211 _WDTOVF _WDTOVF Figure 4.2 User System Interface Circuits SH7211 User system 3Vcc EP1K100FC AHC14 AHC14 47 kΩ NMI NMI 3Vcc LVC08 EP1K100FC AHC14 AHC14 _RES _RES ALVCH16244 Figure 4.
SH7211 User system 1.5Vcc PLLVcc 0.001 μF 120 pF N.C. PLLVcL PLLVss N.C. XTAL PLLVss XTAL N.C. EP1K100FC EXTAL EXTAL MAX709R 47 kΩ VccQ LMC6484AIM 3Vcc 1 kΩ VCC 100 kΩ 1.5Vcc Vcc 0.001 μF 0.01 μF Vss 3Vcc VccQ 120 pF 0.001 μF G6K_2G_DC3V 3Vcc AVcc 0.001 μF 0.01 μF 1000 μF 1000 μF 0.001 μF 0.01 μF 1000 G6K_2G_DC3V 3Vcc μF 1000 μF AVss AVcc AVss AVref AVref Figure 4.
3Vcc SH7211 CBTLV3126 User system 10 kΩ PB2, PB10, PB12 PB15-PB19, PB21 PB2, PB10, PB12 PB15-PB19, PB21 EP1K100FC PB3, PB4, PB13 PB20, PB23, PB26, PB27, PB29 PB3, PB4, PB13 PB20, PB23, PB26, PB27, PB29 PA0-PA25 PD0-PD15 PF0, PF1, PB0, PB1, PB5, PB6, PB8-PB12, PB14, PB22, PB24, PB28 PA0-PA25 PD0-PD15 PF0, PF1, PB0, PB1, PB5, PB6, PB8-PB12, PB14, PB22, PB24, PB28 EP1K100FC Figure 4.
User system SH7211 DA(1:0) DA(1:0) AN(7:0) AN(7:0) AVcc DALC112S1 LVC244 ASEBCK N.C. ASEBCK EP1K100FC ASEBRK N.C. ASEBRK Figure 4.6 User System Interface Circuits 4.2 Delay Time for the User System Interface Since the _RES and NMI signals are connected to the user system via the logic on the EV-chip unit, a delay time shown in table 4.1 will be generated until the signal is input from the user system to the MCU. Table 4.1 Delay Time for Signals via the EV-chip Unit No.
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SH-2A, SH-2 E200F Emulator Additional Document for User's Manual Supplementary Information on Using the SH7211 Publication Date: Rev.1.00, February 6, 2006 Rev.4.00, March 13, 2007 Published by: Sales Strategic Planning Div. Renesas Technology Corp. Edited by: Customer Support Department Global Strategic Communication Div. Renesas Solutions Corp. © 2007. Renesas Technology Corp., All rights reserved. Printed in Japan.
Sales Strategic Planning Div. Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan RENESAS SALES OFFICES http://www.renesas.com Refer to "http://www.renesas.com/en/network" for the latest and detailed information. Renesas Technology America, Inc. 450 Holger Way, San Jose, CA 95134-1368, U.S.A Tel: <1> (408) 382-7500, Fax: <1> (408) 382-7501 Renesas Technology Europe Limited Dukes Meadow, Millboard Road, Bourne End, Buckinghamshire, SL8 5FH, U.K.
SH-2A, SH-2 E200F Emulator Additional Document for User’s Manual Supplementary Information on Using the SH7211
