Specifications

RX62N Group Ethernet Transmit and Receive Settings
3. 2BDescription of Physical Layer Transceiver (PHY) Auto-Negotiation Settings
The sample program uses the Ethernet physical layer transceiver (PHY) to perform auto-negotiation. The auto-
negotiation result is read via the PHY interface register (PIR) of the ETHERC.
3.1 15BOperation of Functions Used
The actual physical layer link processing is performed using the functionality of the Ethernet physical layer
transceiver (PHY). This enables the RX62N to obtain the link result simply by reading it from the Ethernet physical
layer transceiver (PHY). The sample program enables the auto-negotiation function of the physical layer transceiver
(PHY). For details of the functions of the Ethernet physical layer transceiver (PHY), see the Ethernet physical layer
transceiver (PHY) datasheet.
The interface between the ETHERC and the Ethernet physical layer transceiver (PHY) is standardized according to
the IEEE802.3 Media Independent Interface (MII) or Reduced Media Independent Interface (RMII). Figures 3.1 and 3.2
show connection examples for the RX62N and LAN8700i.
The auto-negotiation result is stored in the internal registers of the Ethernet physical layer transceiver (PHY) and can
be read by using a serial interface (Serial Management Interface) employing the MDC and MDIO pins. The RX62N can
read from and write to these pins by using the PIR register. The procedure for accessing the internal registers of the
Ethernet physical layer transceiver (PHY) is described in 3.2, Procedure for Accessing MII/RMII Registers.
ET_RX_ER RX_ER
RX62N
LAN8700i
MII (Media Independent Interface)
ET_TX_ER
ET_ETXD3
ET_ETXD2
ET_ETXD1
ET_ETXD0
ET_TX_EN
ET_TX_CLK
ET_MDC
ET_MDIO
ET_ERXD3
ET_ERXD2
ET_ERXD1
ET_ERXD0
ET_RX_CLK
ET_CRS
ET_COL
ET_RX_DV
TX_ER
TXD3
TXD2
TXD1
TXD0
TX_EN
TX_CLK
MDC
MDIO
RXD3
RXD2
RXD1
RXD0
RX_CLK
CRS
COL
RX_DV
Figure 3.1 LAN8700i Connection Example (MII)
R01AN0629EJ0101 Rev.1.01 Page 6 of 52
Mar 31, 2011