Specifications

RX62N Group Ethernet Transmit and Receive Settings
Start
Clock generation circuit settings
io_set_cpg()
HardwareSetup function
End
Set the system clock (ICLK), peripheral module clock (PCLK),
external bus clock (BCLK), and SDRAM clock (SDCLK).
I/O port settings
ConfigurePortPins()
Set the I/O ports to be used for Ethernet communication.
Module stop function setting
EnablePeripheralModules()
Disable the module stop function for the Ethernet controller
DMA controller (EDMAC).
Figure 2.2 Processing Sequence of Hardware Initialization Function
2.2 13BDetails of Initial Settings
Table 2.1 lists the settings used in the sample program.
Table 2.1 Sample Program Settings
Module Settings
Operating mode Single-chip mode
Clock generation circuit System clock: 96 MHz
Peripheral module clock: 48 MHz
External bus clock and SDRAM clock: 24 MHz
Module stop function Disabled for Ethernet controller DMA controller (EDMAC)
I/O ports Pin settings used for Ethernet communication
2.3 14BNotes on Initial Settings
Do not access the static variable area before the _INIT_SCT function is executed.
The C language static variable area is initialized by executing the _INIT_SCT function. Note that accessing the area
before the function has been run will return undefined values.
R01AN0629EJ0101 Rev.1.01 Page 5 of 52
Mar 31, 2011