Specifications

RX62N Group Ethernet Transmit and Receive Settings
R01AN0629EJ0101 Rev.1.01 Page 48 of 52
Mar 31, 2011
4.6 25BNotes on Transmit/Receive Settings
4.6.1 52BNote on Operating Environment
The sample program uses the auto-negotiation function to select the communication mode. If the amount of time
required for auto-negotiation by the RX62N and the connection partner of the RX62N (the hub in figure 4.14) differs
considerably, communication may fail even though auto-negotiation is successful.
If the connection partner of the RX62N cannot receive even after auto-negotiation completes successfully, insert a
wait period on the RX62N side to enable the connection partner to enter the ready-to-receive state. The amount of time
needed for the connection partner to enter the ready-to-receive state will differ depending on the system, so the user
should perform sufficient evaluation when determining the wait period.
To adjust the duration of the wait period, modify the following lines of code in the R_EtherOpen function (lines 278
to 280) in the r_ether.c file.
/* Delay to stabilize */
/* Set the count according to the system */
for( i = 0 ; i < 0x0000100 ; i++ );
4.6.2 53BNote on Interrupt Handling
The sample program does not use interrupt functions. In order to use interrupts, the user must add appropriate
program code.
4.6.3 54BNote on Error Handling
The sample program does not include routines for handling transmit or receive errors. If error handling is required,
the user must add appropriate program code.
4.6.4 55BNote on Transmit/Receive Buffer Size
The buffers must align with a 32-byte boundary, so the value defined by BUFSIZE in the r_ether.h file assures a 32-
byte aligned value in RAM.
4.6.5 56BNote on Reception Mode
When continuous reception is selected (receive request bit reset (RNR) bit in receiving method control register
(RMCR) set to 1), the EDMAC reads the next descriptor and enters the receive standby state if the value of the RACT
bit is 1.
In continuous reception mode, setting the receive request bit non-reset mode (RNC) bit in the RMCR register to 1
causes EDMAC receive operation to continue, with no clearing of the RR bit even if the RACT bit is cleared to 0
(inactive). (Receive descriptors are fetched consecutively, and receive frame DMA continues.)
This means that data may be overwritten before the receive data is passed to a higher layer. The setting that causes
DMA to continue even when the RACT bit is cleared to 0 (inactive) should not be used under conditions requiring
handshaking, such as TCP communication. This setting is recommended for use in conditions such as UDP
communication where real-time performance is essential and retransmission is not required.