Specifications

RX62N Group Ethernet Transmit and Receive Settings
4.1.8 38BTransmit Descriptor Setting Example
Figure 4.7 shows an example in which three transmit descriptor planes and three transmit buffer planes are used
(single-frame/single-descriptor). In this case, one frame only is transmitted by a single transmit request. The figure is
abbreviated to show only the TD0 portion of each transmit descriptor. The numbers (1), (2), etc., in the figure indicate
the execution sequence.
Settings are performed as follows.
• 1. Since single-frame/single-descriptor operation is used, the TFP1 and TFP0 bits in all the descriptor planes are
set to B'11.
• 2. Bits TACT, TFE, TWBI, and TFS25 to TFS0 in all the descriptor planes are cleared to 0 as the initial value.
• 3. The TDLE bit in the first and second descriptor planes is cleared to 0. The TDLE bit in the third descriptor
plane is set to 1, which causes the first descriptor plane to be read after processing of the third descriptor plane
completes. These settings enable the descriptors to function in a ring configuration.
• 4. Though omitted from figure 4.7, the data length of the transmit buffer referenced by each descriptor is
specified by the TBL bits and the transmit buffer start address by the TBA bits.
• 5. One frame only is transmitted by a single transmit request in this example, so the TACT bit of the first
descriptor plane only is set to 1 for the initial transmission. For the next transmission, the TACT bit of the second
descriptor plane only is set to 1. The transmission procedure is described in more detail in 4.1.10, Function
Operating Procedure (Transmission).
T
A
C
T
T
D
L
E
T
F
P
1
T
F
P
0
T
F
E
T
W
B
I
0
TFS25 to TFS0
0 0 . . 00 1 1 0 0
0 0 1 1 0 0
0 0 1 1 0 0
0 0 . . 0
0 0 . . 0
(1)(4)
(2)(5)
(3)(6)
Transmit descriptors Transmit buffers
1st plane
2nd plane
3rd plane
(Omitted)
(Omitted)
(Omitted)
Figure 4.7 Correspondence of Transmit Descriptors and Transmit Buffers
R01AN0629EJ0101 Rev.1.01 Page 24 of 52
Mar 31, 2011