Specifications

RX62N Group Ethernet Transmit and Receive Settings
4.1.3 33BOverview of ETHERC Receiver
The ETHERC receiver divides the frame from the MII/RMII into the preamble, SFD, data, and CRC, and the fields
from DA (destination address) to the CRC data are output to the receive EDMAC. Figure 4.3 shows the state transitions
of the ETHERC receiver.
1. When the receive enable (ECMR.RE) bit is set to 1, the receiver enters the receive idle state.
2. Upon detecting an SFD (start frame delimiter) after a receive packet preamble, the receiver starts receive
processing. It discards frames with an invalid pattern.
3. In normal mode, if the destination address of the frame matches the RX62N address, or if the broadcast or
multicast frame type is specified, the receiver starts data reception. In promiscuous mode, the receiver starts
reception for any type of frame.
4. After receiving data from the MII/RMII, the receiver performs a CRC check on the frame data field. The result
is indicated as a status bit in the descriptor after the frame data has been written to memory. The receiver reports an
error status in the case of an abnormality.
5. After one frame is received, the receiver prepares to receive the next frame if the receive enable bit in the
ETHERC mode register is set to 1 (ECMR.RE = 1).
Reset
RE set
Preamble
detected
Promiscuous and other
station destination address
SFD received
ET_RX-DV negation
Own destination address
or broadcast
or multicast
or promiscuous
End of reception
Error
notification*
Receive error
detected
Normal reception
Reception
halted
Illegal carrier
detection
Idle
Start of
frame reception
Destination address
received
Error detected Data received
CRC received
Wait for
SFD reception
RE reset
Receive error
detected
Note: * Data is transmitted to the buffer for error frames as well.
[Legend]
SFD: Start frame delimiter
Figure 4.3 Receiver State Transitions
R01AN0629EJ0101 Rev.1.01 Page 20 of 52
Mar 31, 2011