Specifications

RX62N Group Ethernet Transmit and Receive Settings
R01AN0629EJ0101 Rev.1.01 Page 2 of 52
Mar 31, 2011
1. 0BIntroduction
1.1 9BSpecifications
• The sample program supports the big endian and little endian operating modes of the RX62N.
• The sample program supports the Media Independent Interface (MII) and Reduced Media Independent Interface
(RMII).
• The sample program does not include any interrupt handling functionality. In order to use interrupts, it is necessary
for the customer to create the necessary program code separately.
• The sample program does not include routines for handling transmit of receive errors. If error handling functionality
is required, it is necessary for the customer to create the necessary program code separately.
• After a reset is canceled, the sample program makes settings for the clock generation circuit, module stop function,
and I/O registers.
• The LAN8700i from Standard Microsystems Corporation is used as the Ethernet physical layer transceiver (PHY).
• The auto-negotiation function is used for the link to the Ethernet physical layer transceiver (PHY).
• The sample program obtains the auto-negotiation result from the Ethernet physical layer transceiver (PHY)
connected to the RX62N and makes ETHERC settings to match the connection mode information (full-duplex mode
or half-duplex mode, transfer speed* of 10 Mbps or 100 Mbps) obtained.
• The sample program allows selection between the following two types of processing.
⎯ Transmission of 10 Ethernet frames
⎯ Reception of 10 Ethernet frames
Note: * This setting is needed only when using the RMII. When the MII is used, the transfer speed is
detected automatically by the ETHERC from the clock frequency of the physical layer transceiver
(PHY), so there is no need to specify the transfer speed.
1.2 10BFunctions Used
• Clock generation circuit
• Module stop function
• I/O ports
• Ethernet controller (ETHERC)
• Ethernet controller direct memory access controller (EDMAC)