Specifications

RX62N Group Ethernet Transmit and Receive Settings
4. 3BDescription of Transmit/Receive Settings
The sample program makes use of the Ethernet controller (ETHERC) and Ethernet controller direct memory access
controller (EDMAC).
4.1 20BOperation of Functions Used
The RX62N Group always uses the ETHERC and EDMAC to perform Ethernet communication functions. The
ETHERC handles transmit and receive control. The EDMAC uses DMA transfer exclusively to move data between the
transmit and receive FIFOs and the user-specified data storage destinations (buffers).
4.1.1 31BOverview of ETHERC
The RX62N Group has an on-chip Ethernet controller (ETHERC) conforming to the Ethernet or IEEE802.3 Media
Access Control (MAC) layer standard. Connecting a physical layer transceiver (PHY) complying with this standard
enables the ETHERC to perform transmission and reception of Ethernet/IEEE802.3 frames. The ETHERC has one
MAC layer interface port. The ETHERC is connected internally to the Ethernet direct memory access controller for
Ethernet controller (EDMAC), enabling high-speed memory access.
MAC
ETHERC
PHY
EDMAC interface
Command status
interface
Transmit
controller
Receive
controller
EDMAC
MII
Port
RMII
Figure 4.1 Configuration of ETHERC
R01AN0629EJ0101 Rev.1.01 Page 18 of 52
Mar 31, 2011