User`s manual

RX62N Group, RX621 Group 4. Library Reference
2) R_SCI_Create
Synopsis
SCI channel setup.
Prototype
bool R_SCI_Create(
uint8_t data1,
// Channel selection
uint32_t data2,
// Channel configuration
uint32_t data3,
// Bit rate or register value
uint8_t data4
// Interrupt priority level
);
Description (1/3)
Set up the selected SCI channel.
[data1]
Select channel SCIn (where n = 0 to 6, but not 4).
[data2]
Configure the channel. If multiple selections are required, use "|" to separate each selection.
The default settings are shown in bold.
•
Operation mode
PDL_SCI_ASYNC or
PDL_SCI_SYNC or
PDL_SCI_SMART or
PDL_SCI_ASYNC_MP
Choose between Asynchronous,
Clock synchronous,
Smart Card Interface or
Multi-Processor Asynchronous operation.
•
Transmit / Receive connections
PDL_SCI_TX_CONNECTED or
PDL_SCI_TX_DISCONNECTED or
The TXDn output is required / not required.
PDL_SCI_RX_CONNECTED or
PDL_SCI_RX_DISCONNECTED
The RXDn input is required / not required.
•
Data transfer format
PDL_SCI_LSB_FIRST or
PDL_SCI_MSB_FIRST
Select least- or most-significant bit first.
Options which are available in Asynchronous mode or Multi-Processor Asynchronous mode
•
Data clock source selection
PDL_SCI_CLK_INT_IO or
Select the on-chip
baud rate generator.
The SCKn pin functions as an I/O pin.
PDL_SCI_CLK_INT_OUT or
The SCKn pin outputs the bit clock.
PDL_SCI_CLK_EXT or
Input a clock of 8 or 16 times the desired bit rate to the SCKn
pin. See parameter data3 for the multiplier selection.
PDL_SCI_CLK_TMR
For SCI5, select Timer output TMO0.
For SCI6, select Timer output TMO2.
The SCKn pin is set to high-impedance.
•
Data length
PDL_SCI_8_BIT_LENGTH or
PDL_SCI_7_BIT_LENGTH
8- or 7-bit data length.
•
Parity mode
PDL_SCI_PARITY_NONE or
PDL_SCI_PARITY_EVEN or
PDL_SCI_PARITY_ODD
No parity bit, even parity bit or odd parity bit.
Note: Do not set parity bit for Multi-Processor
Asynchronous mode.
•
Stop bit length
PDL_SCI_STOP_1 or
PDL_SCI_STOP_2
One or two stop bits.
The option "PDL_SCI_8N1" can be used to select 8-bit data length, no parity and one stop bit.
R20UT0084EE0112 Rev.1.12 Page 4-170
July. 16, 2014