User`s manual
RX62N Group, RX621 Group 4. Library Reference
Remarks
•
Function R_CGC_Set should be called before any use of this function.
•
If a callback function is specified, this function will enable the relevant interrupt.
Please see the notes on callback function use in §6.
•
A callback function is executed by the interrupt processing function. This means that no other
interrupt can be processed until the callback function has completed.
•
The timing limits depend on the frequency of the peripheral module clock, PCLK.
PCLK
f
n
Period
256×
=
or
256×
=
n
f
Frequency
PCLK
Where n = 4, 64, 128, 512, 2048, 8192, 32768 or 131072.
Examples for different values of f
PCLK
are given below.
f
PCLK
(MHz)
50
12.5
48
12
32
8
Period
PCLK÷4
20.5 µs
81.9 µs
21.3 µs
85.3 µs
32.0 µs
128 µs
Period
PCLK÷64
328 µs
1.31 ms
341µs
1.37 ms
512.0 µs
2.05 ms
Period
PCLK÷128
655 µs
2.62 ms
683 µs
2.73 ms
1.02 ms
4.10 ms
Period
PCLK÷512
2.62 ms
10.5 ms
2.73 ms
10.9 ms
4.10 ms
16.4 ms
Period
PCLK÷2048
10.5 ms
41.9 ms
10.9 ms
43.7 ms
16.4 ms
65.5 ms
Period
PCLK÷8192
41.9 ms
168 ms
43.7 ms
175 ms
65.5 ms
262 ms
Period
PCLK÷32768
168 ms
671 ms
175 ms
699 ms
262 ms
1.05 s
Period
PCLK÷13107
2
671 ms 2.68 s 699 ms
2.8 s
1.05 s 4.19 s
f
PCLK÷4
48.8 kHz
12.2 kHz
46.9 kHz
11.7 kHz
31.3 kHz
7.81 kHz
f
PCLK÷64
3.05 kHz
763 Hz
2.93 kHz
732 Hz
1.95 kHz
488 Hz
f
PCLK÷128
1.53 kHz
381 Hz
1.46 kHz
366 Hz
977 Hz
244 Hz
f
PCLK÷512
381 Hz
95.4 Hz
366 Hz
91.6 Hz
244 Hz
61.0 Hz
f
PCLK÷2048
95.4 Hz
23.8 Hz
91.6 Hz
22.9 Hz
61.0 Hz
15.3 Hz
f
PCLK÷8192
23.8 Hz
5.96 Hz
22.9 Hz
5.72 Hz
15.3 Hz
3.81 Hz
f
PCLK÷32768
5.96 Hz
1.49 Hz
5.72 Hz
1.43 Hz
3.81 Hz
0.954 Hz
f
PCLK÷131072
1.49 Hz
0.373 Hz
1.43 Hz
0.358 Hz
0.954 Hz
0.238 Hz
Program example
/* RPDL definitions */
#include "r_pdl_wdt.h"
/* RPDL device-specific definitions */
#include "r_pdl_definitions.h"
void func(void)
{
/* Configure the watchdog timer for PCLK/4 operation */
R_WDT_Create(
PDL_WDT_PCLK_DIV_4,
WDT_handler,
7
);
/* Configure the watchdog timer for PCLK/131072 operation with output
and reset enable */
R_WDT_Create(
PDL_WDT_PCLK_DIV_131072 | PDL_WDT_RESET_ENABLE,
PDL_NO_FUNC,
0
);
}
R20UT0084EE0112 Rev.1.12 Page 4-163
July. 16, 2014