User`s manual

RX62N Group, RX621 Group 4. Library Reference
4.2.13. Port Output Enable
1) R_POE_Set
Synopsis
Configure the Port Output Enable module.
Prototype
bool R_POE_Set(
uint32_t data1,
// Input configuration selection
uint8_t data2,
// Input configuration selection
uint32_t data3
// Output configuration selection
);
Description (1/2)
Initialise the POE pins.
[data1]
Configure the input pin detection for pins POE0 to POE7.
If multiple selections are required, use "|" to separate each selection.
All settings are optional. Specify PDL_NO_DATA if none are required.
PDL_POE_0_MODE_EDGE or
PDL_POE_0_MODE_LOW_8 or
PDL_POE_0_MODE_LOW_16 or
PDL_POE_0_MODE_LOW_128
For each pin POE0 to POE7, select falling edge or
low level for 16 samples at PCLK ÷ 8,
PCLK ÷ 16 or
PCLK ÷ 128.
PDL_POE_1_MODE_EDGE or
PDL_POE_1_MODE_LOW_8 or
PDL_POE_1_MODE_LOW_16 or
PDL_POE_1_MODE_LOW_128
PDL_POE_2_MODE_EDGE or
PDL_POE_2_MODE_LOW_8 or
PDL_POE_2_MODE_LOW_16 or
PDL_POE_2_MODE_LOW_128
PDL_POE_3_MODE_EDGE or
PDL_POE_3_MODE_LOW_8 or
PDL_POE_3_MODE_LOW_16 or
PDL_POE_3_MODE_LOW_128
PDL_POE_4_MODE_EDGE or
PDL_POE_4_MODE_LOW_8 or
PDL_POE_4_MODE_LOW_16 or
PDL_POE_4_MODE_LOW_128
PDL_POE_5_MODE_EDGE or
PDL_POE_5_MODE_LOW_8 or
PDL_POE_5_MODE_LOW_16 or
PDL_POE_5_MODE_LOW_128
PDL_POE_6_MODE_EDGE or
PDL_POE_6_MODE_LOW_8 or
PDL_POE_6_MODE_LOW_16 or
PDL_POE_6_MODE_LOW_128
PDL_POE_7_MODE_EDGE or
PDL_POE_7_MODE_LOW_8 or
PDL_POE_7_MODE_LOW_16 or
PDL_POE_7_MODE_LOW_12
[data2]
Configure the input pin detection for pins POE8 to POE9.
If multiple selections are required, use "|" to separate each selection.
All settings are optional. Specify PDL_NO_DATA if none are required.
PDL_POE_8_MODE_EDGE or
PDL_POE_8_MODE_LOW_8 or
PDL_POE_8_MODE_LOW_16 or
PDL_POE_8_MODE_LOW_128
For pins POE8 and POE9 select
falling edge or
low level for 16 samples at PCLK ÷ 8,
PCLK ÷ 16 or
PCLK ÷ 128.
PDL_POE_9_MODE_EDGE or
PDL_POE_9_MODE_LOW_8 or
PDL_POE_9_MODE_LOW_16 or
PDL_POE_9_MODE_LOW_128
R20UT0084EE0112 Rev.1.12 Page 4-114
July. 16, 2014