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RX62N Group, RX621 Group 4. Library Reference

Description (3/3)

PDL_DTC_TRIGGER_CMIA0 or

Compare match A on TMR channel n (n = 0 to 3).

PDL_DTC_TRIGGER_CMIA1 or

PDL_DTC_TRIGGER_CMIA2 or

PDL_DTC_TRIGGER_CMIA3 or

PDL_DTC_TRIGGER_CMIB0 or

Compare match B on TMR channel n (n = 0 to 3).

PDL_DTC_TRIGGER_CMIB1 or

PDL_DTC_TRIGGER_CMIB2 or

PDL_DTC_TRIGGER_CMIB3 or

PDL_DTC_TRIGGER_DMACI0 or

Transfer complete on DMAC channel n (n = 0 to 3).

PDL_DTC_TRIGGER_DMACI1 or

PDL_DTC_TRIGGER_DMACI2 or

PDL_DTC_TRIGGER_DMACI3 or

PDL_DTC_TRIGGER_EXDMACI0 or

Transfer complete on EXDMAC channel n (n = 0 to 1).

PDL_DTC_TRIGGER_EXDMACI1 or

PDL_DTC_TRIGGER_RXI0 or

Receive buffer full on SCI channel n

(n = 0 to 3 or 5 to 6).

PDL_DTC_TRIGGER_RXI1 or

PDL_DTC_TRIGGER_RXI2 or

PDL_DTC_TRIGGER_RXI3 or

PDL_DTC_TRIGGER_RXI5 or

PDL_DTC_TRIGGER_RXI6 or

PDL_DTC_TRIGGER_TXI0 or

Transmit buffer empty on SCI channel n

(n = 0 to 3 or 5 to 6).

PDL_DTC_TRIGGER_TXI1 or

PDL_DTC_TRIGGER_TXI2 or

PDL_DTC_TRIGGER_TXI3 or

PDL_DTC_TRIGGER_TXI5 or

PDL_DTC_TRIGGER_TXI6 or

PDL_DTC_TRIGGER_ICRXI0 or

Receive buffer full on I²C channel n (n = 0 to 1).

PDL_DTC_TRIGGER_ICRXI1 or

PDL_DTC_TRIGGER_ICTXI0 or

Transmit buffer empty on I²C channel n (n = 0 to 1).

PDL_DTC_TRIGGER_ICTXI1

[data2]

The start address of the transfer data area. It must be a multiple of 4.

For short address mode, 12 bytes are required to store the transfer data.

For full address mode, 16 bytes are required.

[data3]

The source start address. The valid range depends on the address mode (short or full).

[data4]

The destination start address. The valid range depends on the address mode (short or full).

[data5]

The number of transfers to take place.

For normal or block mode, valid between 0 and 65535 (0 = 65536 transfers).

For repeat mode, valid between 0 and 255 (0 = 256 transfers).

[data6]

The size of each block transfer. Valid between 1 and 255 units.

Ignored in normal or repeat mode.

Return value

True if all parameters are valid and exclusive; otherwise false.