User's Manual

Rev. 5.00, 09/03, page 366 of 760
CPU
CPU
CKIO
DRAK
DREQ
DACK
DMAC(R)
DMAC(W)
DMAC(R)
1st sampling 2nd sampling 3rd sampling
Bus cycle
Figure 11.16 Cycle-Steal Mode, Level Input (CPU Access: 3 Cycles)